Sergei Shtylyov wrote:
Hello.
Stefano Babic wrote:
The buffer for the status request must be word aligned
because it is accessed with 32 bit pointer in the
eth_status_complete function.
Signed-off-by: Stefano Babic sba...@denx.de
[...]
diff --git a/drivers/usb/gadget/ether.c
Remy Bohmer wrote:
Hi,
2010/8/14 Stefano Babic sba...@denx.de:
The patch removes an endless loop in the usb_eth_send
if the tx_complete is not called before going
in the loop. The driver interrupt routine is called
allowing the driver to check if the TX is completed.
Signed-off-by:
The patch removes an endless loop in the usb_eth_send
if the tx_complete is not called before going
in the loop. The driver interrupt routine is called
allowing the driver to check if the TX is completed.
Signed-off-by: Stefano Babic sba...@denx.de
---
drivers/usb/gadget/ether.c | 10
The buffer for the status request must be word aligned
because it is accessed with 32 bit pointer in the
eth_status_complete function.
Signed-off-by: Stefano Babic sba...@denx.de
---
drivers/usb/gadget/ether.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
Hi,
2010/8/15 Stefano Babic sba...@denx.de:
The patch removes an endless loop in the usb_eth_send
if the tx_complete is not called before going
in the loop. The driver interrupt routine is called
allowing the driver to check if the TX is completed.
Signed-off-by: Stefano Babic
Hi,
2010/8/15 Stefano Babic sba...@denx.de:
The buffer for the status request must be word aligned
because it is accessed with 32 bit pointer in the
eth_status_complete function.
Signed-off-by: Stefano Babic sba...@denx.de
---
drivers/usb/gadget/ether.c | 2 +-
1 files changed, 1
Some SATA controllers can operate in an IDE compatible mode (e.g. mvsata)
but will only ever have a single device per bus.
This allows the upcoming DNS323 port to properly identify and use
a drive on both SATA interfaces.
---
include/ide.h |3 ++-
1 files changed, 2 insertions(+), 1
Dear Rogan Dawes,
In message 1281904542-11694-1-git-send-email-ro...@dawes.za.net you wrote:
-#define IDE_BUS(dev)(dev 1)
+#define IDE_BUS(dev)(dev (CONFIG_SYS_IDE_MAXDEVICE / \
+ CONFIG_SYS_IDE_MAXBUS - 1))
Please add parens to make clear you
Hi Alex,
Thanks to Reinhard, his previous work does well on SAM9260 SAM9G20 SAM9XE
SAM9RL (I tested all of them). Since he said he'll provide a more fancy one,
I'm just on hold :-)
For your issue, could you try (If you're using the original EK board from Atmel)
Remove R42
- or -
In
On 08/14/2010 07:51 AM, Brad Parker wrote:
As a comment, that patch looks pretty ugly. I might suggest an inline
function (called callr or nios2_callr) which
encapsulates the __asm__. That would make the code much easier to read.
You could put the inline function in one of the asm headers.
There is a limitation (or bug?) of nios2 toolchain. The nios2 gcc
didn't generate correct code when the reset vector is passed as a
constant. It just generated a direct call, which was wrong when
the reset vector was not located in the same 256MB span as u-boot.
The Nios II Processor Reference
The patchset supports SRAM boot, P1021MDS NAND boot, P1021MDS QE/UEC, it
is against the git://git.denx.de/u-boot-mpc85xx.
Thanks.
Haiying
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Dear Haiying Wang,
In message 1281928450.3071.0.ca...@localhost.localdomain you wrote:
The patchset supports SRAM boot, P1021MDS NAND boot, P1021MDS QE/UEC, it
is against the git://git.denx.de/u-boot-mpc85xx.
Please keep in mind that patches shall be submitted against the
mainline repository,
This addresses Wolfgang's suggestion to use additional parens
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From: Rogan Dawes ro...@dawes.za.net
Some SATA controllers can operate in an IDE compatible mode (e.g. mvsata)
but will only ever have a single device per bus.
This allows the upcoming DNS323 port to properly identify and use
a drive on both SATA interfaces.
---
include/ide.h |3 ++-
1
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