Le 28/09/2010 15:39, Ben Gardiner a écrit :
On Tue, Sep 28, 2010 at 9:14 AM, Albert Aribaudalbert.arib...@free.fr
wrote:
Add -msingle-pic-base to the relocation flags, and compute the pic base
in start.S twice and for all -- once before relocation to run board_init_f,
and once after
Le 28/09/2010 15:57, Heiko Schocher a écrit :
Hello Albert,
Albert Aribaud wrote:
Add -msingle-pic-base to the relocation flags, and compute the pic base
in start.S twice and for all -- once before relocation to run board_init_f,
and once after relocation to run board_init_r and the rest of
Dear Albert ARIBAUD,
In message 4ca2d6d0.1080...@free.fr you wrote:
Tested-by: Heiko Schocherh...@denx.de
Thanks Heiko.
BTW, I forgot to mention that patch 2/2 of this set, being partly =
written by Heiko for the tx25 part, is
Signed-off-by: Heiko Schocherh...@denx.de
Do you
Hi Wolfgang,
Le 29/09/2010 08:50, Wolfgang Denk a écrit :
Dear Albert ARIBAUD,
In message4ca2d6d0.1080...@free.fr you wrote:
Tested-by: Heiko Schocherh...@denx.de
Thanks Heiko.
BTW, I forgot to mention that patch 2/2 of this set, being partly =
written by Heiko for the tx25 part, is
Dear Albert ARIBAUD,
In message 4ca2ecea.1010...@free.fr you wrote:
Do you expect any further work on this, or should we apply this to the
public repo now?
As far as Ben, Heiko and myself are concerned, there is not further work
expected on this. You may possibly want acks from
Usted tiene una transferencia de dinero de $ 85.000.
Por favor confirmar recepción con su nombre y su país. Enviar por correo
electrónico: wud...@w.cn___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hello all,
U-Boot v2010.09 has been released and is available from the git
repository and the FTP server.
The next branch has been pulled into mainline (master branch) and
has been removed afterward.
**
Signed-off-by: Wolfgang Denk w...@denx.de
---
doc/feature-removal-schedule.txt | 29 -
1 files changed, 28 insertions(+), 1 deletions(-)
diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt
index 5fe21e8..3879cb4 100644
---
Hi Wolfgang,
U-Boot v2010.09 has been released and is available from the git
repository and the FTP server.
Cool, thanks!
[...]
*
* Currently, most ARM boards are *broken* and *do not compile*. *
On 2010/09/29 11:29 AM, Wolfgang Denk wrote:
+Why: The implementation of U-Boot for the ARM architecture has
+ been reworked to support relocation. This allows to
+ efficiently use the same U-Bot binary image on systems with
U-Bot?
Rogan
___
In message 1285752572-2107-1-git-send-email...@denx.de I wrote:
Signed-off-by: Wolfgang Denk w...@denx.de
...
---
+What:CONFIG_SYS_ARM_WITHOUT_RELOC option
+When:After Release 2010.03
That should be After Release 2011.03, of course.
[Will fix when I
Dear Detlev Zundel,
In message m24od8ki5t@ohwell.denx.de you wrote:
Support for CONFIG_SYS_ARM_WITHOUT_RELOC will be removed after
release v2010.03; all boards that have not been converted by then,
As many people won't have a time machine ready, I belive this should
read
Hi,
On Wed, Sep 29, 2010 at 11:29:32AM +0200, Wolfgang Denk wrote:
[...]
---
+What:CONFIG_SYS_ARM_WITHOUT_RELOC option
+When:After Release 2010.03
should this be 2011.03, or did I misunderstand anything?
+
+Why: The implementation of U-Boot for the
Dear Rogan Dawes,
In message 4ca308ae.9060...@dawes.za.net you wrote:
On 2010/09/29 11:29 AM, Wolfgang Denk wrote:
+Why: The implementation of U-Boot for the ARM architecture has
+ been reworked to support relocation. This allows to
+ efficiently use the same U-Bot binary image
Dear Wolfgang Wegner,
In message 20100929093901.ga26...@leila.ping.de you wrote:
+What: CONFIG_SYS_ARM_WITHOUT_RELOC option
+When: After Release 2010.03
should this be 2011.03, or did I misunderstand anything?
Yes, no.
+ Support for CONFIG_SYS_ARM_WITHOUT_RELOC will be
On Wed, 29 Sep 2010 11:16:30 +0200, Wolfgang Denk w...@denx.de wrote:
This allows to efficiently use the same U-Bot
The U-Bot strikes again :-)
--
Bas
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
On Wed, Sep 29, 2010 at 02:51:49PM +0200, Bas Mevissen wrote:
On Wed, 29 Sep 2010 11:16:30 +0200, Wolfgang Denk w...@denx.de wrote:
This allows to efficiently use the same U-Bot
The U-Bot strikes again :-)
Striving for world domination.
SCNR,
Wolfgang
On Wednesday, September 29, 2010 05:16:30 Wolfgang Denk wrote:
A little statistics [1] - changes since release v2020.06:
granted it's been years since i was in school taking math courses, but these
totals dont seem to add up ...
Processed 842 csets from 114 developers
842 is the total # of
Dear Mike Frysinger,
In message 201009290941.42366.vap...@gentoo.org you wrote:
On Wednesday, September 29, 2010 05:16:30 Wolfgang Denk wrote:
A little statistics [1] - changes since release v2020.06:
I guess you misses the time warp that I caused by used a version from
10 years in the
This is needed for board with a very short watchdog timeout, like the
lwmon5 with a 100ms timeout. Without this patch this board resets in the
commands with long outputs, like printenv or fdt print.
Note that the image size is not increased with this patch when
CONFIG_HW_WATCHDOG or
From: Sascha Laue sascha.l...@liebherr.com
Needed to ensure that this UART POST is always excecuted.
Signed-off-by: Sascha Laue sascha.l...@liebherr.com
Signed-off-by: Stefan Roese s...@denx.de
---
post/tests.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
Signed-off-by: Stefan Roese s...@denx.de
---
arch/powerpc/include/asm/ppc440epx_grx.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc440epx_grx.h
b/arch/powerpc/include/asm/ppc440epx_grx.h
index 252f35b..6c21472 100644
---
This patch fixes a bug in fdt_fixup_nor_flash_node() when the reg
property has multiple reg tuples, like:
reg = 0 0x 0x0400
0 0x0400 0x0400;
In this case this function did not update the reg property correctly.
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Stefan Roese s...@denx.de
---
board/amcc/canyonlands/canyonlands.c | 20 ++--
1 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/board/amcc/canyonlands/canyonlands.c
b/board/amcc/canyonlands/canyonlands.c
index b26cadb..a30d4f4 100644
---
This patch changes the PPC4xx POST UART driver to use the common
NS16550 functions for receiving and sending. Additionally the
local function for SoC divisor setup are removed. Instead the
functions from arch/powerpc/cpu/ppc4xx/4xx_uart.c are used. This
removes code duplication.
Also the common
I accidentally left these hacks in the code while doing the big header
cleanup. Let's remove it now.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/powerpc/include/asm/ppc4xx.h | 17 -
1 files changed, 0 insertions(+), 17 deletions(-)
diff --git
This is the third submission of this patch series. The first
was an RFC and I received lots of comments that I addressed
in the second for which I got no feedback.
This version fixes some issues I found in testing on a hacked
Beagle kernel with enough device tree functionality to verify
that
Fix two problems in fdt_relocate.
First, for the non relocation case current code calculates
fdt blob size by subtracting the fdt address from the end
of bootmap. This wrong because it assumes that the fdt_blob
is located at the top (high) of the bootmap. Use the current
size plus padding
All arches except nios2 and microblaze call boot_get_fdt
from bootm_start in common/cmd_bootm.c.
Having nios2 and microblaze do so as well removes code from
their respective do_bootm_linux routines and allows removal of
a nasty ifdef from bootm_start.
Signed-off-by: John Rigby
Based on other architectures already supported.
Signed-off-by: John Rigby john.ri...@linaro.org
---
arch/arm/include/asm/config.h |2 +
arch/arm/lib/bootm.c | 137 -
common/image.c|2 +
3 files changed, 125 insertions(+),
For testing ARM device tree support
Signed-off-by: John Rigby john.ri...@linaro.org
---
include/configs/omap3_beagle.h |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 2463be4..daf84c7 100644
Add fdt_fixup_memory_banks and reimplement fdt_fixup_memory
using it.
Signed-off-by: John Rigby john.ri...@linaro.org
---
common/fdt_support.c | 86 ++---
include/fdt_support.h |1 +
2 files changed, 47 insertions(+), 40 deletions(-)
diff --git
The routines boot_ramdisk_high, boot_get_cmdline and boot_get_kbd
are currently enabled by various combinations of CONFIG_M68K,
CONFIG_POWERPC and CONFIG_SPARC.
Use CONFIG_FEATURE defines instead.
CONFIG_BOOT_RAMDISK_HIGH
CONFIG_BOOT_GET_CMDLINE
CONFIG_BOOT_GET_KBD
Define these as appropriate
Hi,
I am trying to map a PCIe peripherical on my MPC8536 custom board. I
already have u-boot and linux kernel running fine on this board.
The peripherical is on PCIe1 port. Compiling u-boot using debug flag I
have the following log:
pci_init_board: devdisr=40900, sdrs2_io_sel=7, io_sel=7
From: Haiying Wang haiying.w...@freescale.com
The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do
From: Haiying Wang haiying.w...@freescale.com
Enable half drive strength, set RTT to 60Ohm and set write leveling override.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds/ddr.c | 16 +---
1 files changed, 13 insertions(+), 3 deletions(-)
From: Haiying Wang haiying.w...@freescale.com
CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which
is 128KB, so it took longer time to do crc32 calculation for ENV than it should
do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it
to 0x2000(8KB),
From: Haiying Wang haiying.w...@freescale.com
The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do
From: Haiying Wang haiying.w...@freescale.com
Enable half drive strength, set RTT to 60Ohm and set write leveling override.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds/ddr.c | 16 +---
1 files changed, 13 insertions(+), 3 deletions(-)
From: Haiying Wang haiying.w...@freescale.com
CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which
is 128KB, so it took longer time to do crc32 calculation for ENV than it should
do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it
to 0x2000(8KB),
Dear haiying.w...@freescale.com,
In message 1285782256-21992-1-git-send-email-haiying.w...@freescale.com you
wrote:
From: Haiying Wang haiying.w...@freescale.com
CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which
is 128KB, so it took longer time to do crc32
The MAX_CMDBUF_SIZE define is unneeded as it should always
equal CONFIG_SYS_CBSIZE.
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
common/main.c |7 ++-
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/common/main.c b/common/main.c
index 8d548db..d97ccd7 100644
---
Update to use the recent, common FSL PCI initialization code.
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
I was making the same changes to X-ES code, so applied them to
other users of the old PCI init code. I only compile tested
them on these boards.
Update to use the recent, common FSL PCI initialization code.
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: s...@denx.de
---
board/tqc/tqm85xx/law.c |4 +-
board/tqc/tqm85xx/tlb.c | 10 ++--
board/tqc/tqm85xx/tqm85xx.c | 151 ---
Update to use the recent, common FSL PCI initialization code.
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: joe.ham...@embeddedspecialties.com
---
board/sbc8641d/sbc8641d.c | 103 ++--
1 files changed, 24 insertions(+), 79 deletions(-)
diff --git
From: Aaron Sierra asie...@xes-inc.com
Some OSes require that secondary cores not be initialized when they
are booted (eg VxWorks). By default when U-Boot is compiled with the
CONFIG_MP option all secondary cores are brought out of reset and held
in spinloops. Setting the mp_holdoff environment
Poll the ds1621 NV Memory Busy bit instead of waiting a static amount of
time for register writes.
Also add config retister bit defines.
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
drivers/hwmon/ds1621.c | 26 +-
1 files changed, 21 insertions(+), 5 deletions(-)
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
drivers/hwmon/ds1621.c | 245 ++--
1 files changed, 114 insertions(+), 131 deletions(-)
diff --git a/drivers/hwmon/ds1621.c b/drivers/hwmon/ds1621.c
index ec1893e..60bf502 100644
---
From: Jeff Dischler jdisch...@xes-inc.com
Fix bug where signed data was processed as unsigned. The bug previously
resulted in negative temperature readings wrapping around, eg -10 became
245.
Signed-off-by: Jeff Dischler jdisch...@xes-inc.com
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
From: John Schmoller jschmol...@xes-inc.com
When a CFI flash chip could not be detected an error message similar to
the following would be printed on bootup:
FLASH: ## Unknown FLASH on Bank 1 - Size = 0x0100 = 0 MB
The printf incorrectly converted the flash size into megabytes. This
patch
From: Brent Darley bdar...@xes-inc.com
This patch does 2 things:
- Fix the argument number assigned to the vdw (VME data width) value.
Previously, a nonexistent 7th arument was read as the vdw variable.
- Reduce the size of the argument array for the tsi148 command from
8 to 7. The
On Wed, 2010-29-09 at 20:25 +0200, Wolfgang Denk wrote:
You submitted the same patch series twice, without any version ID in
the subject, and without any other indication about possible changes.
I am so sorry for sending the patchset twice. I did not add
smtp-server at the first time, then I
Previously io_sel=0xe incorrect stated PCIE1 was enabled. Also add
support for the mpc8640's PCIE2 interface.
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc8xxx/pci_cfg.c |5 -
1 files changed, 4 insertions(+), 1
From: John Schmoller jschmol...@xes-inc.com
Add a new 'pci enum' command which re-enumerates the PCI buses. This
command is enabled via the CONFIG_CMD_PCI_ENUM define and can be useful
in boards with FPGAs connected via PCI/PCIe, boards that support PCI
hot-plugging, or during PCI debug.
Also
Common Freescale code for PCI initialization now exists, so migrate X-ES
boards to use it.
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: Kumar Gala ga...@kernel.crashing.org
---
board/xes/common/fsl_8xxx_pci.c | 367 +-
include/configs/XPEDITE5170.h |
From: John Schmoller jschmol...@xes-inc.com
If a NOR flash is write protected it can not be initialized/detected so
add the ability for boards to skip NOR initialization on bootup. A
board can skip NOR initialization by implementing the
board_flash_wp_on() function.
Signed-off-by: John
From: John Schmoller jschmol...@xes-inc.com
Add board_flash_wp_on() to check a pca9557 gpio pin to see
if non-volatile memory write protection is enabled.
Previously, write protected NOR flashes would fail initialization which
resulted in a bootup error such as:
...
DTT: 53 C local / 64 C
From: John Schmoller jschmol...@xes-inc.com
Initial support for Extreme Engineering Solutions XPedite5500 -
a P2020-based PMC/XMC single board computer.
Signed-off-by: John Schmoller jschmol...@xes-inc.com
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: Kumar Gala ga...@kernel.crashing.org
---
From: John Schmoller jschmol...@xes-inc.com
Create a common checkboard() function to support all X-ES's Freescale
boards.
Also, add a get_board_derivative() function which reads hardware
strapping resistors to determine what model a board is. This allows one
U-Boot image to support multiple
Add memory and I2C posts to the XPedite517x/520x/537x/550x board
families.
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: Kumar Gala ga...@kernel.crashing.org
---
board/xes/common/Makefile|5
board/xes/common/fsl_8xxx_post.c | 43 ++
- Clean up ifdeffery
- Update coding style
No functional change should have occurred.
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: h...@denx.de
---
post/drivers/i2c.c | 48 +++-
1 files changed, 23 insertions(+), 25 deletions(-)
diff --git
The logic previously used in the I2C post was a bit convoluted.
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: h...@denx.de
---
post/drivers/i2c.c | 27 ---
1 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/post/drivers/i2c.c b/post/drivers/i2c.c
index
Some U-Boot images for X-ES boards support multiple products in the same
family. For example, the XPedite5370, XPedite5371, and XPedite5372 are
similar enough that one U-Boot image can work on all 3 cards. To make it
clear that a U-Boot image can work on boards of the same family, rename
the
Add the ability to not report an I2C POST error for a set of given I2C
addresses on bootup. This is useful for the following cases:
- Some form factors such as XMC and Compact PCI Express have an I2C
EEPROM whose address changes based on geographical address. Eg
installed in one slot its
On an XPedite5170 over 11KBytes were saved:
Before:
text data bss dec hex filename
319488 28700 33204 381392 5d1d0 ./u-boot
After:
text data bss dec hex filename
307663 29144 33204 370011 5a55b ./u-boot
According to the I2C specification device address 0 is the general call
address, ie a broadcast address. The I2C specification states that the
format of a general call uses at least 2 bytes, which U-Boot's probing
routine does not adhere to.
Not probing device address 0 will prevent possible
The XPedite517x/537x cards can host an XMC card which contain an I2C
EEPROM at address 0x50. The XMC card is optional, so the EEPROM won't
always be present.
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: Kumar Gala ga...@kernel.crashing.org
---
include/configs/xpedite517x.h |2 ++
On an XPedite5370 over 11KBytes were saved:
Before:
textdata bss dec hex filename
332456 33364 33476 399296 617c0 ./u-boot
After:
text data bss dec hex filename
321075 33836 33476 388387 5ed23 ./u-boot
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc86xx/config.mk |3 +
.../powerpc/cpu/mpc86xx}/u-boot.lds|0
board/freescale/mpc8610hpcd/u-boot.lds | 132 ---
On Wed, 29 Sep 2010 13:44:07 -0500
Peter Tyser pty...@xes-inc.com wrote:
From: Aaron Sierra asie...@xes-inc.com
Some OSes require that secondary cores not be initialized when they
are booted (eg VxWorks). By default when U-Boot is compiled with the
CONFIG_MP option all secondary cores are
This patch adds a new flag to influence the hashtable internal algorithm
for creation size when importing a buffer.
When importing a extremely small buffer (e.g. the default_environment)
the current algorithm cuts down the size of hash table to extremely
small size. In some cases this may render
On Wed, 2010-09-29 at 14:22 -0500, Scott Wood wrote:
On Wed, 29 Sep 2010 13:44:07 -0500
Peter Tyser pty...@xes-inc.com wrote:
From: Aaron Sierra asie...@xes-inc.com
Some OSes require that secondary cores not be initialized when they
are booted (eg VxWorks). By default when U-Boot is
Dear =?UTF-8?q?Andreas=20Bie=C3=9Fmann?=,
In message 1285788486-43901-1-git-send-email-andreas.de...@googlemail.com you
wrote:
This patch adds a new flag to influence the hashtable internal algorithm
for creation size when importing a buffer.
When importing a extremely small buffer (e.g.
On Wed, 29 Sep 2010 14:50:17 -0500
Peter Tyser pty...@xes-inc.com wrote:
On Wed, 2010-09-29 at 14:22 -0500, Scott Wood wrote:
On Wed, 29 Sep 2010 13:44:07 -0500
Peter Tyser pty...@xes-inc.com wrote:
From: Aaron Sierra asie...@xes-inc.com
Some OSes require that secondary cores
(resent to list)
Dear Wolfgang Denk,
Am 29.09.2010 um 22:01 schrieb Wolfgang Denk:
Dear =?UTF-8?q?Andreas=20Bie=C3=9Fmann?=,
In message 1285788486-43901-1-git-send-email-andreas.de...@googlemail.com
you wrote:
[snip]
* unreasonably large numbers (and thus memory footprint) for
Dear Marcel,
In message 201009292233.04020.korg...@home.nl you wrote:
see tools/env for tools to read and write the U-Boot environment
settings from Linux. This can be used to change the boot command, boot
delay etc.
I used an AVR processor before and did this in the environment
Dear =?iso-8859-1?Q?Andreas_Bie=DFmann?=,
In message 8ae7e072-8389-49ca-b6c7-6c15c1877...@googlemail.com you wrote:
With your configuration, importing a 64 kB environment buffer would
result in 32 k entries in the hash table.
Well therefore we have another 'algorithm' implemented to cope
Dear Wolfgang Denk,
Am 29.09.2010 um 23:02 schrieb Wolfgang Denk:
Dear =?iso-8859-1?Q?Andreas_Bie=DFmann?=,
In message 8ae7e072-8389-49ca-b6c7-6c15c1877...@googlemail.com you wrote:
With your configuration, importing a 64 kB environment buffer would
result in 32 k entries in the hash
On Wed, Sep 29, 2010 at 2:05 PM, Peter Tyser pty...@xes-inc.com wrote:
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc86xx/config.mk | 3 +
.../powerpc/cpu/mpc86xx}/u-boot.lds | 0
On Wed, 2010-09-29 at 18:24 -0500, Timur Tabi wrote:
On Wed, Sep 29, 2010 at 2:05 PM, Peter Tyser pty...@xes-inc.com wrote:
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc86xx/config.mk |3 +
On Sep 29, 2010, at 2:05 PM, Peter Tyser wrote:
Previously io_sel=0xe incorrect stated PCIE1 was enabled. Also add
support for the mpc8640's PCIE2 interface.
Signed-off-by: Peter Tyser pty...@xes-inc.com
CC: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc8xxx/pci_cfg.c |
On Aug 16, 2010, at 5:07 AM, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1281945655.24612.10.ca...@localhost.localdomain you wrote:
Ok, will send patch against mainline. It's odd that my patches sent with
this [PATCH 0/7] did not show up in the maillist, including the three
8569
82 matches
Mail list logo