On Tue, Aug 21, 2012 at 9:46 PM, Prabhakar Lad prabhakar@ti.com wrote:
On Tuesday 21 August 2012 09:04 PM, Tom Rini wrote:
On 08/20/2012 10:09 PM, Prabhakar Lad wrote:
Hi Tom,
Thanks for the patch.
On Monday 20 August 2012 10:15 PM, Tom Rini wrote:
Add a board-specific README that
This patchset adds the audio support for EXYNOS5.
This patchset plays a predefined beep sound.
This patchset is based on the following patches:
[U-Boot] [PATCH 1/7 V4] EXYNOS5: Add pinmux support for SPI
[U-Boot] [PATCH 4/7 V3] EXYNOS5: Add base address for SPI
[U-Boot] [PATCH 3/7 V3] EXYNOS: Add
This pastc adds driver for audio codec WM8994
Signed-off-by: R. Chandrasekar rcse...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
drivers/sound/Makefile |1 +
drivers/sound/wm8994.c | 781
This patch adds driver for I2S interface specific to samsung.
Signed-off-by: R. Chandrasekar rcse...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- renamed i2s.c to samsung-i2s.c.
Makefile|1 +
drivers/sound/Makefile | 47
This patch adds command to test audio playback.
sound init - Initialises the audio subsystem (i2s and wm8994 codec)
sound play - Plays predefined the audio data.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
common/Makefile|1 +
common/cmd_sound.c |
This patch adds the audio parameters required by the I2S to play the
predefined audio data.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
arch/arm/include/asm/arch-exynos/sound.h | 44 ++
1 files changed, 44 insertions(+), 0
This patch add I2S registers
Signed-off-by: R. Chandrasekar rcse...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
arch/arm/include/asm/arch-exynos/i2s-regs.h | 66 +++
1 files changed, 66 insertions(+), 0 deletions(-)
This patch adds pinmux support for I2S1
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- made exynos_i2s_config pinmux function static.
arch/arm/cpu/armv7/exynos/pinmux.c| 12
arch/arm/include/asm/arch-exynos/periph.h |1 +
2 files
This patch enables sound support for EXYNOS5
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- corrected the commit message.
include/configs/smdk5250.h |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/include/configs/smdk5250.h
This patch adds base address for I2S
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
arch/arm/include/asm/arch-exynos/cpu.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
This patch adds clock support for I2S
Signed-off-by: R. Chandrasekar rcse...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
arch/arm/cpu/armv7/exynos/clock.c| 119 ++
arch/arm/include/asm/arch-exynos/clk.h |
Hi, Andreas
On 8/21/2012 6:46 PM, Andreas Bießmann wrote:
Dear Josh Wu,
On 16.08.2012 07:05, Josh Wu wrote:
Signed-off-by: Josh Wu josh...@atmel.com
---
board/atmel/at91sam9x5ek/at91sam9x5ek.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git
On 21/08/2012 19:26, Fabio Estevam wrote:
Use IMX_GPIO_NR macro.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx51evk/mx51evk.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/freescale/mx51evk/mx51evk.c
On 21/08/2012 19:26, Fabio Estevam wrote:
Use IMX_GPIO_NR macro.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx53ard/mx53ard.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx53ard/mx53ard.c
On 21/08/2012 19:26, Fabio Estevam wrote:
Use IMX_GPIO_NR macro.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx53loco/mx53loco.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx53loco/mx53loco.c
On 21/08/2012 19:51, Troy Kisky wrote:
On 8/20/2012 11:11 PM, Stefano Babic wrote:
On 21/08/2012 01:03, Troy Kisky wrote:
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index bba37ac..594d613 100644
---
Hi Graeme,
On 08/21/2012 02:29 PM, Graeme Russ wrote:
http://www.j1nx.nl/xbmc-amlogic-8726-m-pivos-xios-an-initial-investigation/
Thanks for the link. Looks like it uses the same GPU (Mali 400) as the
AllWinner A10
The Geniatech Enjoy TV series looks pretty good, particularly the ATV1000:
On 21/08/2012 23:07, Benoît Thébaudeau wrote:
Define default SoC input clock frequencies for i.MX35 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Stefano Babic sba...@denx.de
---
This patch depends on
On 21/08/2012 23:07, Benoît Thébaudeau wrote:
Switch the mx35 timer driver to the 32-kHz clock source to avoid calling
mxc_get_clock() again and again, and to be consistent with the timer drivers
of
other i.MX SoCs.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc:
[cc'd Manjunath Hadli]
Hi Tom,
On Mon, Aug 20, 2012 at 6:45 PM, Tom Rini tr...@ti.com wrote:
Add a board-specific README that documents how to write u-boot.ais to
the SPI found on this board.
Changes-series: 2
- Add
Signed-off-by: Tom Rini tr...@ti.com
---
Hi Stefan,
On Aug 22, 2012 5:24 PM, Stefan Roese s...@denx.de wrote:
Hi Graeme,
On 08/21/2012 02:29 PM, Graeme Russ wrote:
http://www.j1nx.nl/xbmc-amlogic-8726-m-pivos-xios-an-initial-investigation/
Thanks for the link. Looks like it uses the same GPU (Mali 400) as the
AllWinner A10
Hi,
On Wednesday 22 August 2012 01:43 PM, Christian Riesch wrote:
[cc'd Manjunath Hadli]
Hi Tom,
On Mon, Aug 20, 2012 at 6:45 PM, Tom Rini tr...@ti.com wrote:
Add a board-specific README that documents how to write u-boot.ais to
the SPI found on this board.
Changes-series: 2
- Add
Hi Prabhakar,
On Wed, Aug 22, 2012 at 11:07 AM, Prabhakar Lad prabhakar@ti.com wrote:
Hi,
On Wednesday 22 August 2012 01:43 PM, Christian Riesch wrote:
[cc'd Manjunath Hadli]
Hi Tom,
On Mon, Aug 20, 2012 at 6:45 PM, Tom Rini tr...@ti.com wrote:
Add a board-specific README that
Hi Tom,
On Mon, Aug 20, 2012 at 6:45 PM, Tom Rini tr...@ti.com wrote:
- Convert the non-relocation part of board_init_f to spl_board_init,
turn on CONFIG_SPL_BOARD_INIT in the configs.
- Remove duplicated code.
- Add spl_boot_device() that returns the statically chosen boot device.
I
Hi Christian,
On Wednesday 22 August 2012 02:47 PM, Christian Riesch wrote:
Hi Prabhakar,
On Wed, Aug 22, 2012 at 11:07 AM, Prabhakar Lad prabhakar@ti.com wrote:
Hi,
On Wednesday 22 August 2012 01:43 PM, Christian Riesch wrote:
[cc'd Manjunath Hadli]
Hi Tom,
On Mon, Aug 20, 2012
Avoid clutter in ueth_data. Individual drivers should not mess
with structures belonging to the core like this.
Signed-off-by: Lucas Stach d...@lynxeye.de
---
drivers/usb/eth/smsc95xx.c | 48 --
include/usb_ether.h| 8 ++--
2 Dateien
Hi all,
This series supersedes the earlier posted patches to support the
AX88772B chip. I've split this up into a series as what started
as a small patch to get the chip working turned into a journey
through the usbeth stack and now not only reworks a lot of the
ASIX code, but also touches other
If the environment doesn't provide a MAC address it's not an
error to use the one provided by the eth adapter. Actually it
should be the default case if the adapter exports it's own
address during get_info().
So just remove the warning that gets printed in this case.
Signed-off-by: Lucas Stach
All ASIX chipsets aside from AX88172 are able to set the MAC
address on the hardware level. Add a function to expose this
ability.
To differentiate between chip types we now carry flags as driver
private data. Also while touching the asix_dongles array
constify this.
Signed-off-by: Lucas Stach
The basic device reset ensures that the device is ready to
service commands and does not need to get redone before each
network operation.
Split out the basic reset from asix_init() and instead call it
from asix_eth_get_info(), so that it only gets called once.
Signed-off-by: Lucas Stach
Add AX88772B ID together with two fixes needed to make this work.
1. The packet length check has to be adjusted, as all ASIX chips
only use 11 bits to indicate the length. AX88772B uses the other
bits to indicate unrelated things, which cause the check to fail.
This fix is based on a fix for the
Initial device MAC should be read while getting info about the
device, so it's wrong to only read it in asix_init().
Add a dedicated function to read the initial MAC, which is also
able to handle devices that have their initial MAC stored in
EEPROM. Call this function inasix_eth_get_info().
Hi Tom,
On Wednesday 22 August 2012 03:34 PM, Christian Riesch wrote:
Hi Tom,
On Mon, Aug 20, 2012 at 6:45 PM, Tom Rini tr...@ti.com wrote:
- Convert the non-relocation part of board_init_f to spl_board_init,
turn on CONFIG_SPL_BOARD_INIT in the configs.
- Remove duplicated code.
- Add
On 14.08.2012 14:52, Benoît Thébaudeau wrote:
This can be useful for fuse-like hardware, OTP SoC options, etc.
For i.MX6, I have a port of the OTP support from Freescale's U-Boot to
our mainline U-Boot in the queue [1].
As I don't have the overview over the various i.MXxx SoCs and don't
Hi Dirk,
On Wednesday, August 22, 2012 12:43:05 PM, Dirk Behme wrote:
On 14.08.2012 14:52, Benoît Thébaudeau wrote:
This can be useful for fuse-like hardware, OTP SoC options, etc.
For i.MX6, I have a port of the OTP support from Freescale's U-Boot
to
our mainline U-Boot in the queue [1].
Hi Prabhakar,
On Wednesday, August 22, 2012, Prabhakar Lad wrote:
Hi Christian,
On Wednesday 22 August 2012 02:47 PM, Christian Riesch wrote:
Hi Prabhakar,
On Wed, Aug 22, 2012 at 11:07 AM, Prabhakar Lad
prabhakar@ti.comjavascript:;
wrote:
Hi,
On Wednesday 22 August 2012
Hi Guys,
We have developed Blackfin based board using BF547-Rev04.
At the moment we face strange probably hardware issue.
Let me share few details
- GCC assumes rev 0.2 of the CPU is this OK with the rev 0.4 which we have
on board?
- The DDR routing due to a PCB mistake is not perfect now so
On Tue, Aug 21, 2012 at 12:16:40AM -0700, Prafulla Wadaskar wrote:
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-
boun...@lists.denx.de] On Behalf Of Albert ARIBAUD
Sent: 18 August 2012 02:59
To: Tom Rini
Cc: u-boot@lists.denx.de
Subject: Re:
On Tuesday 21 August 2012 22:17:27 Marek Vasut wrote:
This change implements DMA chaining into SPI driver. This allows
the transfers to go much faster, while also fixing SF issues.
might be nice to have the word DMA in the patch summary
MX28: SPI: Supercharge the SPI driver w/DMA
-mike
On Tue, Aug 21, 2012 at 11:17 PM, Marek Vasut ma...@denx.de wrote:
int mxs_dma_go(int chan)
{
- uint32_t timeout = 1;
+ uint32_t timeout = 1000;
Should we use a proper timeout mechanism instead?
Reagards,
Fabio Estevam
___
On Wednesday 22 August 2012 11:13:54 Dimitar Penev wrote:
- GCC assumes rev 0.2 of the CPU is this OK with the rev 0.4 which we have
on board?
err, gcc assumes nothing. this is controlled by your board config's
CONFIG_BFIN_CPU setting.
The first reason for this behavior seems to be memory
On 08/20/2012 01:59 PM, Lucas Stach wrote:
Am Montag, den 20.08.2012, 12:09 -0600 schrieb Stephen Warren:
On 08/19/2012 10:08 AM, Lucas Stach wrote:
With this series we are able to initialize USB controllers
using an external ULPI phy AKA USB2 on Tegra 2 devices.
This was tested to work on a
On Fri, Aug 17, 2012 at 1:27 PM, York Sun york...@freescale.com wrote:
The QCSP registers are at offset 0x1000 for SoCs with QMan v3.
Signed-off-by: York Sun york...@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h | 19 ++-
1 files changed, 18 insertions(+), 1
Hi Dirk,
On Wednesday, August 22, 2012 6:25:57 PM, Dirk Behme wrote:
On 22.08.2012 13:11, Benoît Thébaudeau wrote:
Hi Dirk,
On Wednesday, August 22, 2012 12:43:05 PM, Dirk Behme wrote:
On 14.08.2012 14:52, Benoît Thébaudeau wrote:
This can be useful for fuse-like hardware, OTP SoC
On Wed, Aug 22, 2012 at 10:13:02AM +0200, Christian Riesch wrote:
[cc'd Manjunath Hadli]
Hi Tom,
On Mon, Aug 20, 2012 at 6:45 PM, Tom Rini tr...@ti.com wrote:
Add a board-specific README that documents how to write u-boot.ais to
the SPI found on this board.
Changes-series: 2
- Add
On Wed, Aug 22, 2012 at 03:35:30PM +0530, Prabhakar Lad wrote:
Hi Christian,
On Wednesday 22 August 2012 02:47 PM, Christian Riesch wrote:
Hi Prabhakar,
On Wed, Aug 22, 2012 at 11:07 AM, Prabhakar Lad prabhakar@ti.com
wrote:
Hi,
On Wednesday 22 August 2012 01:43 PM,
On Wed, Aug 22, 2012 at 12:04:27PM +0200, Christian Riesch wrote:
Hi Tom,
On Mon, Aug 20, 2012 at 6:45 PM, Tom Rini tr...@ti.com wrote:
- Convert the non-relocation part of board_init_f to spl_board_init,
turn on CONFIG_SPL_BOARD_INIT in the configs.
- Remove duplicated code.
- Add
Dear Fabio Estevam,
On Tue, Aug 21, 2012 at 11:17 PM, Marek Vasut ma...@denx.de wrote:
int mxs_dma_go(int chan)
{
- uint32_t timeout = 1;
+ uint32_t timeout = 1000;
Should we use a proper timeout mechanism instead?
What would that be? I think 10 seconds is
Dear Mike Frysinger,
On Tuesday 21 August 2012 22:17:27 Marek Vasut wrote:
This change implements DMA chaining into SPI driver. This allows
the transfers to go much faster, while also fixing SF issues.
might be nice to have the word DMA in the patch summary
MX28: SPI: Supercharge the
Dear Łukasz Dałek,
Signed-off-by: Łukasz Dałek luk0...@gmail.com
---
drivers/usb/gadget/Makefile |1 +
drivers/usb/gadget/pxa25x_udc.c | 2059
+++ drivers/usb/gadget/pxa25x_udc.h |
168
3 files changed, 2228 insertions(+), 0 deletions(-)
Dear Lucas Stach,
Hi all,
This series supersedes the earlier posted patches to support the
AX88772B chip. I've split this up into a series as what started
as a small patch to get the chip working turned into a journey
through the usbeth stack and now not only reworks a lot of the
ASIX
Dear Lucas Stach,
Avoid clutter in ueth_data. Individual drivers should not mess
with structures belonging to the core like this.
Signed-off-by: Lucas Stach d...@lynxeye.de
Reviewed-by: Marek Vasut ma...@denx.de
Acked-by: Marek Vasut ma...@denx.de
---
drivers/usb/eth/smsc95xx.c | 48
Dear Lucas Stach,
If the environment doesn't provide a MAC address it's not an
error to use the one provided by the eth adapter. Actually it
should be the default case if the adapter exports it's own
address during get_info().
I think we should warn if the addr in env doesn't match the one
Dear Lucas Stach,
The basic device reset ensures that the device is ready to
service commands and does not need to get redone before each
network operation.
Split out the basic reset from asix_init() and instead call it
from asix_eth_get_info(), so that it only gets called once.
Dear Lucas Stach,
All ASIX chipsets aside from AX88172 are able to set the MAC
address on the hardware level. Add a function to expose this
ability.
To differentiate between chip types we now carry flags as driver
private data. Also while touching the asix_dongles array
constify this.
Dear Lucas Stach,
Initial device MAC should be read while getting info about the
device, so it's wrong to only read it in asix_init().
Add a dedicated function to read the initial MAC, which is also
able to handle devices that have their initial MAC stored in
EEPROM. Call this function
Dear Lucas Stach,
Add AX88772B ID together with two fixes needed to make this work.
1. The packet length check has to be adjusted, as all ASIX chips
only use 11 bits to indicate the length. AX88772B uses the other
bits to indicate unrelated things, which cause the check to fail.
This fix
Dear Marek Vasut,
I'm submitting hereby the initial code for the driver model. This is a RFC
patch, please give it a spin and scream :-)
The GPIO api should now use the new approach on the sandbox target. There's
also dm command, that allows dumping the driver tree.
Expanding CC ... guys,
On 8/22/2012 12:22 AM, Stefano Babic wrote:
On 21/08/2012 19:51, Troy Kisky wrote:
On 8/20/2012 11:11 PM, Stefano Babic wrote:
On 21/08/2012 01:03, Troy Kisky wrote:
So, you are saying CONFIG_ options don't belong in imx-regs.h, or
you didn't notice I stuck it there, or both???
I didn't
Am Mittwoch, den 22.08.2012, 20:22 +0200 schrieb Marek Vasut:
Dear Lucas Stach,
If the environment doesn't provide a MAC address it's not an
error to use the one provided by the eth adapter. Actually it
should be the default case if the adapter exports it's own
address during
On 8/22/2012 11:30 AM, Troy Kisky wrote:
On 8/22/2012 12:22 AM, Stefano Babic wrote:
On 21/08/2012 19:51, Troy Kisky wrote:
On 8/20/2012 11:11 PM, Stefano Babic wrote:
On 21/08/2012 01:03, Troy Kisky wrote:
So, you are saying CONFIG_ options don't belong in imx-regs.h, or
you didn't notice
On Wed, 2012-08-22 at 11:18 -0500, Andy Fleming wrote:
On Fri, Aug 17, 2012 at 1:27 PM, York Sun york...@freescale.com wrote:
The QCSP registers are at offset 0x1000 for SoCs with QMan v3.
Signed-off-by: York Sun york...@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h | 19
Hi Lucas / Marek,
On Wed, Aug 22, 2012 at 1:32 PM, Lucas Stach d...@lynxeye.de wrote:
Am Mittwoch, den 22.08.2012, 20:22 +0200 schrieb Marek Vasut:
Dear Lucas Stach,
If the environment doesn't provide a MAC address it's not an
error to use the one provided by the eth adapter. Actually it
Hi Lucas,
On Wed, Aug 22, 2012 at 5:09 AM, Lucas Stach d...@lynxeye.de wrote:
Avoid clutter in ueth_data. Individual drivers should not mess
with structures belonging to the core like this.
Signed-off-by: Lucas Stach d...@lynxeye.de
Acked-by: Joe Hershberger joe.hershber...@ni.com
Hi Lucas,
On Wed, Aug 22, 2012 at 5:09 AM, Lucas Stach d...@lynxeye.de wrote:
The basic device reset ensures that the device is ready to
service commands and does not need to get redone before each
network operation.
Split out the basic reset from asix_init() and instead call it
from
On Wed, Aug 22, 2012 at 2:42 PM, Marek Vasut marek.va...@gmail.com wrote:
Dear Fabio Estevam,
On Tue, Aug 21, 2012 at 11:17 PM, Marek Vasut ma...@denx.de wrote:
int mxs_dma_go(int chan)
{
- uint32_t timeout = 1;
+ uint32_t timeout = 1000;
Should we use a proper
Hi Lucas,
On Wed, Aug 22, 2012 at 5:09 AM, Lucas Stach d...@lynxeye.de wrote:
Initial device MAC should be read while getting info about the
device, so it's wrong to only read it in asix_init().
Add a dedicated function to read the initial MAC, which is also
able to handle devices that have
Hi Lucas,
On Wed, Aug 22, 2012 at 5:09 AM, Lucas Stach d...@lynxeye.de wrote:
Add AX88772B ID together with two fixes needed to make this work.
1. The packet length check has to be adjusted, as all ASIX chips
only use 11 bits to indicate the length. AX88772B uses the other
bits to indicate
Hi Lucas,
On Wed, Aug 22, 2012 at 5:09 AM, Lucas Stach d...@lynxeye.de wrote:
All ASIX chipsets aside from AX88172 are able to set the MAC
address on the hardware level. Add a function to expose this
ability.
To differentiate between chip types we now carry flags as driver
private data.
On Wed, Aug 22, 2012 at 10:46:19AM -0700, Tom Rini wrote:
On Wed, Aug 22, 2012 at 12:04:27PM +0200, Christian Riesch wrote:
Hi Tom,
On Mon, Aug 20, 2012 at 6:45 PM, Tom Rini tr...@ti.com wrote:
- Convert the non-relocation part of board_init_f to spl_board_init,
turn on
Allow usage of the imx-common/iomux-v3.h framework by including pad settings
for the i.MX51. The content of the file is taken from Linux kernel at
commit 5d23b39 plus the required changes to make it work in U-Boot.
The contained pad settings are the minimum required to make an Efika MX boot
and
* Move Efika MX Smarttop and Smartbook boards into a genesi vendor directory
* Rename efikamx - mx51_efikamx since there is an mx53_efikamx and mx6_efikamx
to come
Signed-off-by: Matt Sealey m...@genesi-usa.com
---
board/{efikamx = genesi/mx51_efikamx}/Makefile|0
.../{efikamx =
Efika MX boards configure their DDR pad settings twice, one in the DCD generated
from imximage_*.cfg and again in init_drive_strength called before relocation.
Rather than doing this, roll the changes it makes into the DCD so DDR is set up
before a single line of code in U-Boot is run.
The
PCBID pads seem to need time to settle due to external pulldowns, otherwise
we are reading floating GPIO pins with implicit pad pullups and get the wrong
data. However we can't wait at the time we need them before relocation,
since timers are not available. The time taken to get from DCD to the
This is a rework of a previously submitted patchset and bundles the
main board support and USB support into a single commit.
It requires the patch mx5: add iomux-mx51.h include
* Use iomux-mx51.h include to simplify board configuration.
* Simplify LED support (remove efikamx_toggle_led, change
Dear Fabio Estevam,
On Wed, Aug 22, 2012 at 2:42 PM, Marek Vasut marek.va...@gmail.com wrote:
Dear Fabio Estevam,
On Tue, Aug 21, 2012 at 11:17 PM, Marek Vasut ma...@denx.de wrote:
int mxs_dma_go(int chan)
{
- uint32_t timeout = 1;
+ uint32_t timeout =
On 8/20/2012 5:35 PM, Andy Fleming wrote:
On Monday, August 20, 2012, Troy Kisky wrote:
It is useful to be able to try a range of
possible phy addresses to connect.
This seems like it just encourages a bad habit.
Which is?
How do you envision this working on a system with
From: Fabio Estevam fabio.este...@freescale.com
For representing a timeout value, it makes more sense to pass it as
'unsigned int'.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/cpu/arm926ejs/mxs/mxs.c |6 --
arch/arm/include/asm/arch-mxs/sys_proto.h |
On 08/20/2012 05:35 PM, Andy Fleming wrote:
On Monday, August 20, 2012, Troy Kisky wrote:
It is useful to be able to try a range of
possible phy addresses to connect.
This seems like it just encourages a bad habit. How do you envision this
working on a system with multiple Ethernet
Dear Fabio Estevam,
From: Fabio Estevam fabio.este...@freescale.com
For representing a timeout value, it makes more sense to pass it as
'unsigned int'.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Acked-by: Marek Vasut ma...@denx.de
---
arch/arm/cpu/arm926ejs/mxs/mxs.c
Hi Scott,
On Fri, Aug 17, 2012 at 3:53 PM, Scott Wood scottw...@freescale.com wrote:
On 08/17/2012 03:31 PM, Joe Hershberger wrote:
NAND unlock command allows an invert bit to be set to unlock all but
the selected page range.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
On Wed, Aug 22, 2012 at 2:59 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 8/20/2012 5:35 PM, Andy Fleming wrote:
On Monday, August 20, 2012, Troy Kisky wrote:
It is useful to be able to try a range of
possible phy addresses to connect.
This seems like it just encourages a
Hi Andy,
On Wed, Aug 22, 2012 at 3:40 PM, Andy Fleming aflem...@gmail.com wrote:
On Wed, Aug 22, 2012 at 2:59 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 8/20/2012 5:35 PM, Andy Fleming wrote:
The same way it works currently. I removed no features.
Agreed. But the way it works
On Wed, Aug 22, 2012 at 3:11 PM, Eric Nelson
eric.nel...@boundarydevices.com wrote:
On 08/20/2012 05:35 PM, Andy Fleming wrote:
On Monday, August 20, 2012, Troy Kisky wrote:
It's best if the driver make the reasonable assumption that its PHY
address
is known when it comes up, and let the
On 08/22/2012 01:50 PM, Andy Fleming wrote:
On Wed, Aug 22, 2012 at 3:11 PM, Eric Nelson
eric.nel...@boundarydevices.com wrote:
On 08/20/2012 05:35 PM, Andy Fleming wrote:
On Monday, August 20, 2012, Troy Kisky wrote:
It's best if the driver make the reasonable assumption that its PHY
Avoid clutter in ueth_data. Individual drivers should not mess
with structures belonging to the core like this.
Signed-off-by: Lucas Stach d...@lynxeye.de
Reviewed-by: Marek Vasut ma...@denx.de
Acked-by: Marek Vasut ma...@denx.de
Acked-by: Joe Hershberger joe.hershber...@ni.com
---
The basic device reset ensures that the device is ready to
service commands and does not need to get redone before each
network operation.
Split out the basic reset from asix_init() and instead call it
from asix_eth_get_info(), so that it only gets called once.
Signed-off-by: Lucas Stach
Hi all,
This series supersedes the earlier posted patches to support the
AX88772B chip. I've split this up into a series as what started
as a small patch to get the chip working turned into a journey
through the usbeth stack and now not only reworks a lot of the
ASIX code, but also touches other
Initial device MAC should be read while getting info about the
device, so it's wrong to only read it in asix_init().
Add a dedicated function to read the initial MAC, which is also
able to handle devices that have their initial MAC stored in
EEPROM. Call this function inasix_eth_get_info().
Add AX88772B ID together with two fixes needed to make this work.
1. The packet length check has to be adjusted, as all ASIX chips
only use 11 bits to indicate the length. AX88772B uses the other
bits to indicate unrelated things, which cause the check to fail.
This fix is based on a fix for the
All ASIX chipsets aside from AX88172 are able to set the MAC
address on the hardware level. Add a function to expose this
ability.
To differentiate between chip types we now carry flags as driver
private data. Also while touching the asix_dongles array
constify this.
Signed-off-by: Lucas Stach
On Mon, Jul 23, 2012 at 3:58 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
PowerPC mandates SP to be 16 bytes aligned.
Furthermore, a stack frame is added, pointing to the reset vector
which may in the way when gdb is walking the stack because
the reset vector may not accessible
Hi Lucas,
On Wed, Aug 22, 2012 at 4:04 PM, Lucas Stach d...@lynxeye.de wrote:
All ASIX chipsets aside from AX88172 are able to set the MAC
address on the hardware level. Add a function to expose this
ability.
To differentiate between chip types we now carry flags as driver
private data.
On 8/22/2012 1:40 PM, Andy Fleming wrote:
1) Modify the driver so that the PHY address is passed in from board
initialization code programmatically. As a nod to the effort of doing
so for all boards, you can create a default value (ie - as it was),
that can be overridden by board code.
2)
On Wednesday 22 August 2012 13:43:19 Marek Vasut wrote:
Dear Mike Frysinger,
On Tuesday 21 August 2012 22:17:27 Marek Vasut wrote:
This change implements DMA chaining into SPI driver. This allows
the transfers to go much faster, while also fixing SF issues.
might be nice to have the
Missed in previous cleanup.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v2:
- Added loff_t cleanup to series
drivers/mtd/nand/nand_util.c | 5 +++--
include/nand.h | 3 ++-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git
NAND unlock command allows an invert bit to be set to unlock all but
the selected page range.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v2:
- Changed invert to allexcept
- Changed unlock printf to debug print
- Dropped cast in unlock debug print
common/cmd_nand.c
NAND_CMD_ constants for lock/unlock should be in the header
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
drivers/mtd/nand/nand_util.c | 6 --
include/linux/mtd/nand.h | 2 ++
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/nand_util.c
Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not
the same as others. Instead of bit 1 being lock, it is #lock_tight.
To make the driver support either format, ignore bit 1 and use only
bit 0 and bit 2.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in
Hi!
From: Dinh Nguyen dingu...@altera.com
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Albert, it seems you should be one merging this...? (Am I right?) Is
there anything we need to fix? Was it too late?
Thanks,
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