Hi Alexey,
On Nov 27, 2013, at 9:45 AM, Alexey Brodkin wrote:
Hi Pantelis,
On Wed, 2013-11-27 at 09:21 +0200, Pantelis Antoniou wrote:
Hi Alexey,
On Nov 27, 2013, at 9:11 AM, Alexey Brodkin wrote:
ATM if no host-fifoth_val value is provided the code will calculate one and
write
Hi, Alexey.
On 11/27/2013 04:45 PM, Alexey Brodkin wrote:
Hi Pantelis,
On Wed, 2013-11-27 at 09:21 +0200, Pantelis Antoniou wrote:
Hi Alexey,
On Nov 27, 2013, at 9:11 AM, Alexey Brodkin wrote:
ATM if no host-fifoth_val value is provided the code will calculate one and
write it.
On 08/11/2013 14:08, Fabio Estevam wrote:
OCOTP driver is currently selected via CONFIG_MXC_OCOTP option.
Remove the old OCOTP related options, as they are not used anymore.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Applied to u-boot-imx, thanks.
Best regards,
Stefano
On 25/11/2013 13:34, Fabio Estevam wrote:
Currently HDMI splash screen is selected by default on mx6sabresd boards.
As LVDS is also enabled, this causes incorrect colors to be displayed im the
LVDS panel.
Fix this by selecting the LVDS panel as the default splash output and only
keep
On 09/11/2013 00:50, Eric Nelson wrote:
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk
On 20/11/2013 23:26, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
On mx31pdk board the PMIC is connected via SPI interface, so it does not make
sense to pass I2C_PMIC into the pmic_init() interface.
Pass the SPI bus number via CONFIG_FSL_PMIC_BUS option instead.
On 20/11/2013 23:26, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
On mx51evk board the PMIC is connected via SPI interface, so it does not make
sense to pass I2C_PMIC into the pmic_init() interface.
Pass the SPI bus number via CONFIG_FSL_PMIC_BUS option instead.
On 20/11/2013 23:26, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
On efikamx board the PMIC is connected via SPI interface, so it does not make
sense to pass I2C_PMIC into the pmic_init() interface.
Pass the SPI bus number via CONFIG_FSL_PMIC_BUS option instead.
On 20/11/2013 23:26, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
There is no need to pass p-bus differently when the PMIC is connected via SPI
or via I2C.
Handle the both cases in the same way.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
On 11/11/2013 17:22, Marek Vasut wrote:
Add cpu_clock_teardown() call before the Linux kernel is started,
so the CPU code can stop clock that may hinder the Linux's boot.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Stefano Babic sba...@denx.de
On 11/11/2013 17:22, Marek Vasut wrote:
Split the SATA clock enabling function and add PCI express clock
enabling function. The SATA clock enabling function starts up the
100MHz SATA reference PLL in ENET_PLL register, but the code can
be re-used to enable the 125MHz PCIe reference in
On 11/11/2013 17:22, Marek Vasut wrote:
Make indirect vectors addresses global, so they can be replaced by
various code that needs to do so. For example the MX6 PCI express
driver needs to temporarily replace data abort handler when reading
the config space.
Signed-off-by: Marek Vasut
On 11/11/2013 17:22, Marek Vasut wrote:
Add PCIe driver for the Freescale i.MX6 SoC . This driver operates the
PCIe block in RC mode only, the EP mode is NOT supported. The driver is
tested with the Intel e1000 NIC driver.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud
On 11/11/2013 17:22, Marek Vasut wrote:
Enable PCI express on MX6 Sabrelite.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Eric Nelson eric.nel...@boundarydevices.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic sba...@denx.de
On 08/11/2013 19:20, Fabio Estevam wrote:
mx6sabre board has a m25p32 SPI NOR connected to ECSPI1 port.
Add support for it.
This patch allows the SPI NOR flash to be succesfully detected:
= sf probe
SF: Detected M25P32 with
Hi,
On 11/11/2013 17:22, Marek Vasut wrote:
Enable PCI express on MX6 Sabrelite.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Eric Nelson eric.nel...@boundarydevices.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic
Hi,
On 11/11/2013 17:22, Marek Vasut wrote:
Add cpu_clock_teardown() call before the Linux kernel is started,
so the CPU code can stop clock that may hinder the Linux's boot.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Stefano Babic
Hi Marek,
On 27/11/2013 09:59, Marek Vasut wrote:
Hi,
On 11/11/2013 17:22, Marek Vasut wrote:
Add cpu_clock_teardown() call before the Linux kernel is started,
so the CPU code can stop clock that may hinder the Linux's boot.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud
Hi Tom,
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Tom Rini
Sent: Tuesday, November 26, 2013 5:59 AM
To: u-boot@lists.denx.de
Subject: [U-Boot] [ANN] v2014.01-rc1
Hey all,
I've put v2014.01-rc1 out and and we should
On Wednesday 27 November 2013 05:47 AM, Vaibhav Bedia wrote:
On Mon, Nov 25, 2013 at 12:18 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
On Friday 22 November 2013 02:22 AM, Vaibhav Bedia wrote:
On Thu, Nov 21, 2013 at 1:18 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
[...]
-/*
- * Get SDRAM
When U-Boot is configured for Versatile AB, it will still pass
the machine ID of Versatile PB to the kernel. After this simple
fix the system boots correctly.
Cc: Stefano Babic sba...@denx.de
Cc: Marek Vasut ma...@denx.de
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
The Versatiles come up with the primary UART set to ttyAMA0 at
38400 baud, and unless we pass this to the kernel it will assume
it is set to 9600 baud which will be quite awkward for the
terminal, let's try to be helpful and inform the kernel what
setting is used.
Cc: Stefano Babic sba...@denx.de
Dear Linus Walleij,
When U-Boot is configured for Versatile AB, it will still pass
the machine ID of Versatile PB to the kernel. After this simple
fix the system boots correctly.
Cc: Stefano Babic sba...@denx.de
Cc: Marek Vasut ma...@denx.de
Signed-off-by: Linus Walleij
Dear Linus Walleij,
+CC Albert, he's the ARM guy. Stefano is the Freescale IMX guy :)
When U-Boot is configured for Versatile AB, it will still pass
the machine ID of Versatile PB to the kernel. After this simple
fix the system boots correctly.
Cc: Stefano Babic sba...@denx.de
Cc: Marek
Dear Linus Walleij,
The Versatiles come up with the primary UART set to ttyAMA0 at
38400 baud, and unless we pass this to the kernel it will assume
it is set to 9600 baud which will be quite awkward for the
terminal, let's try to be helpful and inform the kernel what
setting is used.
Cc:
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
include/configs/trats2.h |4
1 file changed, 4 deletions(-)
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index
In this patch variable names are used instead of hardcoded names
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
include/configs/trats2.h |6 +++---
1 file changed, 3 insertions(+), 3
This patch series cleanups some code for Trats2.
Unused defines are removed.
For envs, hardcoded names are replaced with variable names.
In the board file, 'samsung_get_base' common functions are used.
Tizen partions layout is updated.
This patch series is based on:
This patch updates Tizen partions layout.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
include/configs/trats2.h | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff
This patch use 'samsung_get_base' common functions to access registers.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
board/samsung/trats2/trats2.c | 16
1 file changed, 8
On 11/22/2013 6:08 PM, Bo Shen wrote:
Hi Josh,
On 11/22/2013 02:58 PM, Josh Wu wrote:
This patch will save U-Boot environment as a file: uboot.env, in FAT
partition
instead of saving it in raw sector of SD card.
Since saving environment in raw sector has risk of corrupting the SD
card and
On Wed, Nov 27, 2013 at 5:53 AM, Stefano Babic sba...@denx.de wrote:
Hi Otavio,
On 26/11/2013 13:16, Otavio Salvador wrote:
I'm going to suggest this is the wrong path. Once you see i.MX systems
with 768MB DDR you're going to have initrd/fdt placed into memory
Linux can't access without
On Wed, Nov 27, 2013 at 4:40 AM, Wolfgang Denk w...@denx.de wrote:
Dear Otavio Salvador,
In message
CAP9ODKqBwH+LfhTcPMBn1ppUtfpfUnUyyN8CTi=akwja1ka...@mail.gmail.com you
wrote:
Do I understand correctly that this happens only with the FSL kernel,
i. e. not with mainline Linux?
Hello,
We've recently updated from u-boot 2013.04 to u-boot 2013.10 on our
IGEP boards (OMAP3 based, U-Boot shows OMAP36XX/37XX-GP ES1.2), and
we're seeing random I2C communication problems at startup.
Most of the time it's just:
Out: serial
Err: serial
i2c_write: pads on bus 0 probably
Hi Pantelis,
Indeed this is bogus. What is the reset value of the fifoth register?
Below is a description for the register in question with default
values specified.
--
FIFO Threshold Watermark Register
--
x
As proposed by Heiko I made some small changes and verified the patch with the
checkpatch-script.
From 169f40e72fceb222bb15dd59c1337f42371e97a5 Mon Sep 17 00:00:00 2001
From: Andreas Oetken andreas.oet...@siemens.com
Date: Wed, 27 Nov 2013 13:09:19 +0100
Subject: [PATCH] Added rsa-sha256
On Wed, Nov 27, 2013 at 10:55 AM, Marek Vasut ma...@denx.de wrote:
We should just switch to DT, but I do understand the motivation here.
I will be working on cleanups and DT next, this is just to get a
working baseline.
Can you
not detect which board it is dynamically to avoid the ifdef?
No
On Wed, Nov 27, 2013 at 11:02 AM, Marek Vasut ma...@denx.de wrote:
Dear Linus Walleij,
+CC Albert, he's the ARM guy. Stefano is the Freescale IMX guy :)
I just saw in the git log that Stefano had a few commits to these
boards...
Yours,
Linus Walleij
On Wed, Nov 27, 2013 at 11:03 AM, Marek Vasut ma...@denx.de wrote:
[Me]
#define CONFIG_BOOTDELAY 2
#define CONFIG_BOOTARGS root=/dev/nfs mem=128M ip=dhcp \
- netdev=25,0,0xf101,0xf1010010,eth0
+
On 27/11/2013 10:55, Marek Vasut wrote:
Dear Linus Walleij,
When U-Boot is configured for Versatile AB, it will still pass
the machine ID of Versatile PB to the kernel. After this simple
fix the system boots correctly.
Cc: Stefano Babic sba...@denx.de
Cc: Marek Vasut ma...@denx.de
If platform provides host-fifoth_val it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.
This implementation allows:
* escape unclear and recursive calculations that are currently in use
* use whatever custom value for DWMCI_FIFOTH initialization
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
On 11/27/2013 10:00 PM, Alexey Brodkin wrote:
If platform provides host-fifoth_val it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.
This implementation allows:
* escape unclear and recursive
Hello!
I would like to compile U-Boot with custom configuration.
I downloaded source from the master git repository
(http://git.denx.de/?p=u-boot.git;a=summary).
I am trying to compile using following commands:
$ cd u-boot/
$ make ARCH=arm CROSS_COMPILE=arm-unknown-linux-gnu-
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/27/2013 02:03 AM, Masahiro Yamada wrote:
Hello.
As always, please speak up if something suddenly broke or you've found a
problem of some sort. Thanks all!
I noticed at least two boards got broken by v2014.01-rc release:
cam_enc_4xx and
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/27/2013 04:33 AM, Yan, Miao wrote:
Hi Tom,
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Tom Rini
Sent: Tuesday, November 26, 2013 5:59 AM
To: u-boot@lists.denx.de
Dear Alexey Smishlayev,
On 11/27/2013 01:26 PM, Alexey Smishlayev wrote:
Hello!
I would like to compile U-Boot with custom configuration.
I downloaded source from the master git repository
(http://git.denx.de/?p=u-boot.git;a=summary).
I am trying to compile using following commands:
$ cd
On Wed, Nov 27, 2013 at 1:51 PM, Stefano Babic sba...@denx.de wrote:
I do not know if it is possible, but if yes, we did not need in the past to
introduce CONFIG_ARCH_VERSATILE_AB.
The boards are similar enough that they will boot to prompt, but they
will register the wrong set of peripherals,
Hi Scott,
This makes the names match current Linux source, and resolves
a conflict between
http://patchwork.ozlabs.org/patch/280488/
and
http://patchwork.ozlabs.org/patch/284513/
The former was posted first and is closer to matching Linux, but
unlike Linux it does not add _LARGE to the
Dear Andreas Bießmann,
On 2013.11.27. 15:39, Andreas Bießmann wrote:
crt0.S:70 subtracts the GD_SIZE from current stack pointer. The code
written seems to miss the Rn according to [1]. Could you please test to
change it from to: 'sub sp, sp, #GD_SIZE'?
Yes, thank you! Now it successfully
Hi Thomas,
CC'ing Javier Martínez
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Hello,
We've recently updated from u-boot 2013.04 to u-boot 2013.10 on our
IGEP boards (OMAP3 based, U-Boot shows OMAP36XX/37XX-GP ES1.2), and
we're seeing random I2C communication problems
Dear Alexey Smishlayev,
On 11/27/2013 02:53 PM, Alexey Smishlayev wrote:
On 2013.11.27. 15:39, Andreas Bießmann wrote:
crt0.S:70 subtracts the GD_SIZE from current stack pointer. The code
written seems to miss the Rn according to [1]. Could you please test to
change it from to: 'sub sp, sp,
Hi Marek,
On 11/27/2013 01:59 AM, Marek Vasut wrote:
Hi,
On 11/11/2013 17:22, Marek Vasut wrote:
Enable PCI express on MX6 Sabrelite.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Eric Nelson eric.nel...@boundarydevices.com
Cc: Fabio Estevam
Dear Enric Balletbo Serra,
On Wed, 27 Nov 2013 14:56:15 +0100, Enric Balletbo Serra wrote:
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Hello,
We've recently updated from u-boot 2013.04 to u-boot 2013.10 on our
IGEP boards (OMAP3 based, U-Boot shows OMAP36XX/37XX-GP
argv[0] contains bootvx (command name) not the load address, if called with
argv 2 use load_addr, else use address argument given to the command.
Signed-off-by: Stany MARCEL smar...@novasys-ingenierie.com
---
This patch has been tested on uboot-xlnx master.
common/cmd_elf.c | 6 +++---
1 file
Hi Thomas,
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Dear Enric Balletbo Serra,
On Wed, 27 Nov 2013 14:56:15 +0100, Enric Balletbo Serra wrote:
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Hello,
We've recently updated from u-boot 2013.04 to
The zeroing of I2Ci.I2C_CNT register at the end of i2c_write causes
random I2C failures in OMAP3 based devices. This is probably related
to the following advisory in OMAP3 errata:
I2C Module Does Not Allow 0-Byte Data Requests
Details:
When configured as the master, the I2C module does not allow
On Wed, Nov 27, 2013 at 01:19:29PM +0100, Thomas Petazzoni wrote:
Hello,
We've recently updated from u-boot 2013.04 to u-boot 2013.10 on our
IGEP boards (OMAP3 based, U-Boot shows OMAP36XX/37XX-GP ES1.2), and
we're seeing random I2C communication problems at startup.
Most of the time
Dear Enric Balletbo Serra,
On 11/27/2013 03:22 PM, Enric Balletbo Serra wrote:
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
On Wed, 27 Nov 2013 14:56:15 +0100, Enric Balletbo Serra wrote:
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
We've recently
On 11/27/2013 04:22 PM, Enric Balletbo Serra wrote:
Hi Thomas,
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Dear Enric Balletbo Serra,
On Wed, 27 Nov 2013 14:56:15 +0100, Enric Balletbo Serra wrote:
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Hello,
On 11/27/2013 04:22 PM, Enric Balletbo Serra wrote:
Hi Thomas,
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Dear Enric Balletbo Serra,
On Wed, 27 Nov 2013 14:56:15 +0100, Enric Balletbo Serra wrote:
2013/11/27 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Hello,
Hi Eric,
Hi Marek,
On 11/27/2013 01:59 AM, Marek Vasut wrote:
Hi,
On 11/11/2013 17:22, Marek Vasut wrote:
Enable PCI express on MX6 Sabrelite.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Eric Nelson
Dear Alexey Smishlayev,
On 11/27/2013 03:43 PM, Alexey Smishlayev wrote:
Thank you for the advice!
The toolchain I'm using was provided by manufacturer of the embedded board I
am working with.
Which toolchain should I pick instead?
reference for u-boot is ELDK [1]. Some use mentor (formerly
On Wed, Nov 27, 2013 at 04:44:09PM +0200, Nikita Kiryanov wrote:
The zeroing of I2Ci.I2C_CNT register at the end of i2c_write causes
random I2C failures in OMAP3 based devices. This is probably related
to the following advisory in OMAP3 errata:
I2C Module Does Not Allow 0-Byte Data Requests
Building some arm boards with older binutils may produce errors like this:
---8---
crt0.S: Assembler messages:
crt0.S:70: Error: register expected, not '#(184)' -- `sub sp,#(184)'
---8---
Use canonical version of the subtract mnemonic to avoid those issues.
Reported-by: Alexey Smishlayev
Dear Nikita Kiryanov,
On Wed, 27 Nov 2013 16:52:56 +0200, Nikita Kiryanov wrote:
Not sure to understand your question: my paragraph above mentions the
IGEP board as being the platform on which I'm seeing this. So indeed, a
OMAP3-based board is affected. But maybe I misunderstood your
Dear Tom Rini,
On Wed, 27 Nov 2013 09:45:55 -0500, Tom Rini wrote:
I see that 960187ffa125b3938fec4b827bd9e8c04a204af8 (ARM: OMAP: I2C:
New read, write and probe functions) has changed significantly the
OMAP I2C driver. And it turns out that reverting this commit actually
fixes the
Hi Thomas
On Wed, Nov 27, 2013 at 4:35 PM, Thomas Petazzoni
thomas.petazz...@free-electrons.com wrote:
Dear Tom Rini,
On Wed, 27 Nov 2013 09:45:55 -0500, Tom Rini wrote:
I see that 960187ffa125b3938fec4b827bd9e8c04a204af8 (ARM: OMAP: I2C:
New read, write and probe functions) has changed
From: Hardik Patel hardik.pa...@volansystech.com
OMAP4460 PandaBoard-ES till Rev B3 used Elpida EDB8064B2PB-xx-F RAM. However,
starting Rev B3,
boards are now manufactured with Elpida EDB8164B3PF-xx-F DDR2 RAM.
---
Changes for v3:
- Implemented strong emif_get_reg_dump function in panda.c to
From: Hardik Patel hardik.pa...@volansystech.com
Signed-off-by: Hardik Patel hardik.pa...@volansystech.com
---
arch/arm/cpu/armv7/omap4/sdram_elpida.c |4 +-
arch/arm/include/asm/arch-omap4/sys_proto.h |4 ++
board/ti/panda/panda.c | 60
On 11/27/2013 05:28 PM, Thomas Petazzoni wrote:
Dear Nikita Kiryanov,
On Wed, 27 Nov 2013 16:52:56 +0200, Nikita Kiryanov wrote:
Not sure to understand your question: my paragraph above mentions the
IGEP board as being the platform on which I'm seeing this. So indeed, a
OMAP3-based board is
Hi Nikita,all,
On 27-Nov-13 17:52, Nikita Kiryanov wrote:
On 11/27/2013 05:28 PM, Thomas Petazzoni wrote:
Dear Nikita Kiryanov,
On Wed, 27 Nov 2013 16:52:56 +0200, Nikita Kiryanov wrote:
Not sure to understand your question: my paragraph above mentions the
IGEP board as being the platform
Dear Nikita Kiryanov,
On Wed, 27 Nov 2013 17:52:31 +0200, Nikita Kiryanov wrote:
The zeroing of the cnt register also happens in other places in the
driver, and it is entirely possible that they should be removed for
OMAP3s as well.
In my patch I removed it only for i2c_write() because the
On 11/27/2013 05:09 PM, Tom Rini wrote:
On Wed, Nov 27, 2013 at 04:44:09PM +0200, Nikita Kiryanov wrote:
The zeroing of I2Ci.I2C_CNT register at the end of i2c_write causes
random I2C failures in OMAP3 based devices. This is probably related
to the following advisory in OMAP3 errata:
I2C
On Wed, Nov 27, 2013 at 06:01:18PM +0200, Lubomir Popov wrote:
Hi Nikita,all,
On 27-Nov-13 17:52, Nikita Kiryanov wrote:
On 11/27/2013 05:28 PM, Thomas Petazzoni wrote:
Dear Nikita Kiryanov,
On Wed, 27 Nov 2013 16:52:56 +0200, Nikita Kiryanov wrote:
Not sure to understand your
Thanks Marek,
On 11/11/2013 09:22 AM, Marek Vasut wrote:
Enable PCI express on MX6 Sabrelite.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Eric Nelson eric.nel...@boundarydevices.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic
On 11/27/2013 06:10 PM, Thomas Petazzoni wrote:
Dear Nikita Kiryanov,
On Wed, 27 Nov 2013 17:52:31 +0200, Nikita Kiryanov wrote:
The zeroing of the cnt register also happens in other places in the
driver, and it is entirely possible that they should be removed for
OMAP3s as well.
In my patch
Hi all,
2013/11/27 Nikita Kiryanov nik...@compulab.co.il:
On 11/27/2013 06:10 PM, Thomas Petazzoni wrote:
Dear Nikita Kiryanov,
On Wed, 27 Nov 2013 17:52:31 +0200, Nikita Kiryanov wrote:
The zeroing of the cnt register also happens in other places in the
driver, and it is entirely
Some code in board_init_f that dates back to the initial relocation
support had if/else for PRELOADER (which became SPL_BUILD) about setting
the stack pointer. But, board.c is never built for CONFIG_SPL_BUILD
now, so this really makes no sense. Drop this section.
Cc: Albert ARIBAUD
If U-Boot build with DEBUG enabled/defined the first call of debug
function (that dumps data to any available console) will happen before
zeroing of initial gd in init call zero_global_data in
init_sequence_f.
And if stack was not filled with zeros chances are high that
gd-have_console won't be
The code in arch/arm/lib/board.c::board_init_f that sets
gd-start_addr_sp has already make sure we're 8-byte aligned, so we
don't need to do that again.
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/lib/crt0.S |1 -
1 file changed, 1
Hi Tom,
On Wed, Nov 27, 2013 at 06:01:18PM +0200, Lubomir Popov wrote:
Hi Nikita,all,
On 27-Nov-13 17:52, Nikita Kiryanov wrote:
On 11/27/2013 05:28 PM, Thomas Petazzoni wrote:
Dear Nikita Kiryanov,
On Wed, 27 Nov 2013 16:52:56 +0200, Nikita Kiryanov wrote:
Not sure to understand your
MEM_PLL_RAT on T4240/T4160 Rev2.0 uses a value which is half of Rev1.0.
It's 12 in Rev1.0, for Rev2.0 it uses 6.
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
Signed-off-by: Shaohui Xie shaohui@freescale.com
Reviewed-by: Yusong Sun york...@freescale.com
---
On Wed, Nov 27, 2013 at 1:58 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
On Wednesday 27 November 2013 05:36 AM, Vaibhav Bedia wrote:
On Mon, Nov 25, 2013 at 12:08 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
On Friday 22 November 2013 02:07 AM, Vaibhav Bedia wrote:
On Thu, Nov 21, 2013 at 1:18
On Wed, Nov 27, 2013 at 4:34 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
[...]
Ideally the default value should be exported from e-fuse values.
EMIF does some HW sequence according to the value exported here. This filed
tells
what type of memory it is.
No, eFuse is not the right place for
Hello Tom, Albert.
(I'm CCing Simon)
Some code in board_init_f that dates back to the initial relocation
support had if/else for PRELOADER (which became SPL_BUILD) about setting
the stack pointer. But, board.c is never built for CONFIG_SPL_BUILD
now, so this really makes no sense. Drop this
Hi,
On 27 November 2013 18:38, Masahiro Yamada yamad...@jp.panasonic.comwrote:
Hello Tom, Albert.
(I'm CCing Simon)
Some code in board_init_f that dates back to the initial relocation
support had if/else for PRELOADER (which became SPL_BUILD) about setting
the stack pointer. But,
On 27 November 2013 11:32, Alexey Brodkin alexey.brod...@synopsys.comwrote:
If U-Boot build with DEBUG enabled/defined the first call of debug
function (that dumps data to any available console) will happen before
zeroing of initial gd in init call zero_global_data in
init_sequence_f.
And
$(LDSCRIPT) is a source file, not a generated file.
We do not need a make rule of $(LDSCRIPT).
And one more trivial fix:
$(obj)/u-boot should not dierectly depend on $(LDSCRIPTS).
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
I built all target boards and checked md5sum of output
On Thu, Nov 28, 2013 at 10:38:31AM +0900, Masahiro Yamada wrote:
Hello Tom, Albert.
(I'm CCing Simon)
Some code in board_init_f that dates back to the initial relocation
support had if/else for PRELOADER (which became SPL_BUILD) about setting
the stack pointer. But, board.c is never
From: Kuo-Jung Su dant...@faraday-tech.com
The Faraday FTSSP010 is a multi-function controller
which supports I2S/SPI/SSP/AC97/SPDIF. However This
patch implements only the SPI mode.
NOTE:
The DMA and CS/Clock control logic has been altered
since hardware revision 1.19.0. So this patch
would
From: Kuo-Jung Su dant...@faraday-tech.com
Replace the legacy i2c model with the new one.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
Cc: Heiko Schocher h...@denx.de
---
Changes for v2:
- Nothing updates
drivers/i2c/fti2c010.c | 299 +---
From: Kuo-Jung Su dant...@faraday-tech.com
For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B),
the r/w address should be serial out in MSB order.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
Cc: Heiko Schocher h...@denx.de
---
Changes for v2:
- Initial release
From: Kuo-Jung Su dant...@faraday-tech.com
This changeset adapts the driver to the new one.
In patch v2, it also includes a bug fix for i2c r/w address and eeprom.
Changes for v2:
1. eeprom: bug fix for i2c read/write
2. fti2c010: serial out r/w address in MSB order
Kuo-Jung Su (4):
i2c:
From: Kuo-Jung Su dant...@faraday-tech.com
Coding style cleanup
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
Cc: Heiko Schocher h...@denx.de
---
Changes for v2:
- Nothing updates
drivers/i2c/fti2c010.c | 31 ---
1 file changed, 16 insertions(+), 15
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTNANDC021 is an integrated NAND flash controller.
It use a build-in command table to abstract the underlying
NAND flash control logic.
For example:
Issuing a command 0x10 to FTNANDC021 would result in
a page write + a read status operation.
From: Kuo-Jung Su dant...@faraday-tech.com
The local pointer of address (i.e., addr) only gets
referenced in SPI mode, and it won't be appropriate
to pass only 1 bytes addr[1] to i2c_read/i2c_write while
CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1.
To avoid ambiguity, this patch would drop the use of
Masahiro Yamada (2):
post: descend only when CONFIG_HAS_POST is defined
Makefile: Select objects by CONFIG_ rather than $(ARCH) or $(CPU)
Makefile | 14 +-
arch/powerpc/cpu/Makefile | 6 +++---
arch/powerpc/cpu/mpc8xxx/Makefile | 6 ++
All objects under post/ directory are enabled by CONFIG_HAS_POST.
(post/tests.o is enabled by CONFIG_POST_STD_LIST.
But CONFIG_POST_STD_LIST depends on CONFIG_HAS_POST.)
We can move CONFIG_HAS_POST switch to the top Makefile.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
FYI:
Convert like follows:
CPU mpc83xx - CONFIG_MPC83xx
CPU mpc85xx - CONFIG_MPC85xx
CPU mpc86xx - CONFIG_MPC86xx
CPU mpc5xxx - CONFIG_MPC5xxx
CPU mpc8xx - CONFIG_8xx
CPU mpc8260 - CONFIG_8260
CPU ppc4xx - CONFIG_4xx
CPU x86 - CONFIG_X86
ARCH x86 - CONFIG_X86
ARCH powerpc -
Before switching to the real Kbuild, drivers/usb/gadget/Makefile
must be fixed.
If none of CONFIG_USB_GADGET, CONFIG_USB_ETHER, CONFIG_USB_DEVICE
is defined, both obj- and obj-y get empty.
We need non-empty obj- or obj-y on each Makefile
to generate built-in.o on the real Kbuild.
Signed-off-by:
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