On Wed, Apr 29, 2015 at 12:33:05PM +0200, Michal Simek wrote:
Use error-prone system timer implementation to simplify our code.
I think you forgot a word in there :)
--
Tom
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Add command sf info to show the information of the current SPI flash device.
Signed-off-by: Haikun Wang haikun.w...@freescale.com
---
In current sf driver, we show the debug information during the flash probe
period.
In case of without DM SPI, we need to run command sf probe to get the debug
The GLOBAL_BOOT_MODE_ADDR for i.MX28 is taken from an U-Boot patch for the
MX28EVK:
http://repository.timesys.com/buildsources/u/u-boot/u-boot-2009.08/u-boot-2009.08-mx28-201012211513.patch
It could be 0x0001a7f0 too:
/* The global boot mode will be detected by ROM code and
* a boot mode
Default name of spi flash like this 0:0, update it to spi_flash@0:0.
Signed-off-by: Haikun Wang haikun.w...@freescale.com
---
drivers/mtd/spi/sf-uclass.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c
index
Hi,
On 20 April 2015 at 12:37, Simon Glass s...@chromium.org wrote:
When driver model is used for I2C, the real-time clock functionality does
not work (e.g. the 'date' command gives build errors when CONFIG_DM_I2C is
defined). It is possible to work around this by using driver model I2C
Having this as a Kconfig allows it to be a dependent feature.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v2: None
configs/acadia_defconfig | 1 +
configs/bamboo_defconfig | 1 +
configs/bubinga_defconfig
Hello Nathan,
On 04/28/2015 10:49 PM, Nathan wrote:
On Tue, Apr 28, 2015 at 3:07 AM, Przemyslaw Marczak
p.marc...@samsung.com wrote:
Sorry, I didn't reply last time, becouse I'm quite busy.
No worries. I was really just keeping you apprised of my findings.
If I good remember, Exynos 54xx
Hi Tom,
please pull these zynq and zynqmp changes to your tree.
Thanks,
Michal
The following changes since commit cc555bd4f40a652471df4a3621d45ee57df0ca11:
Merge branch 'master' of git://git.denx.de/u-boot-spi (2015-04-28
07:28:43 -0400)
are available in the git repository at:
Hi Marek,
On Tuesday, April 28, 2015 at 10:59:16 AM, Michal Simek wrote:
On 09/05/2014 08:46 AM, Siva Durga Prasad Paladugu wrote:
Update the ci_udc driver to support bulk transfer
and also added capability of having multiple dtds
if requested data is more thank 16K.
These changes
Hi Tom,
I have just this one small patch. Please apply.
Thanks,
Michal
The following changes since commit cc555bd4f40a652471df4a3621d45ee57df0ca11:
Merge branch 'master' of git://git.denx.de/u-boot-spi (2015-04-28
07:28:43 -0400)
are available in the git repository at:
Added routine mmu_set_region_dcache_behaviour() to set a
particular region as non cacheable.
Define dummy routine for mmu_set_region_dcache_behaviour()
to handle incase of dcache off.
Signed-off-by: Siva Durga Prasad Paladugu siva...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
Most modern x86 CPUs include more than one CPU core. The OS normally requires
that these 'Application Processors' (APs) be brought up by the boot loader.
Add the required support to U-Boot to init additional APs.
From: Shaohui Xie shaohui@freescale.com
cpld reset altbank should always reset to bank4 no matter what current
bank is.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
board/freescale/t4rdb/cpld.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git
On 29.04.2015 07:50, Joe Hershberger wrote:
Having this as a Kconfig allows it to be a dependent feature.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Reviewed-by: Simon Glass s...@chromium.org
Acked-by: Stefan Roese s...@denx.de
Thanks,
Stefan
Bonjour Simon,
Le Tue, 28 Apr 2015 20:43:47 -0600, Simon Glass s...@chromium.org a
écrit :
Thanks for the various reviews on this series. If there is nothing
else, I will pull this in soon.
Seems ok, apart from a few 'implicit declaration' warnings here that do
not seem to have been seen by
This includes moving CONFIG_REGEX to Kconfig and adding support for
regex to the env_attr lists (when CONFIG_REGEX is enabled).
This allows ethaddrs to all be checked for access and format by default.
Also use callbacks to keep network stack variables up to date instead of
polling them on each
Hello Tim,
Am 28.04.2015 um 17:44 schrieb Tim Harvey:
The IMX6 has four different speed grades determined by eFUSE SPEED_GRADING
(OCOTP_CFG3[17:16]).
Display this value to make it clear the difference regarding the CPU speed
currently running at vs the max speed allowed per grade. Note that
Hi Simon,
While working on moving the sunxi ehci code over to the driver model I've
found this bug in the usb uclass which causes a div by zero error.
I've spend a couple of hours yesterday evening debugging this and I'm happy
to report that I've a fix now. This fix has not seen as much testing
Hi Rob,
On Tue, Apr 28, 2015 at 05:24:59PM -0500, Rob Herring wrote:
On Wed, Apr 22, 2015 at 8:04 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi,
I've been trying to use fastboot (and especially the boot command) on
sunxi recently, and got it to work pretty fine (apart
usb_child_pre_probe() initializes the final struct usb_device by redoingthe
usb_select_config() done by usb_scan_device() but not the usb_prepare_device()
call, this leads to a call into the hcd to get the device descriptors without
ep0's maxpacketsize being set, which leads to a device by 0 error
Currently we copy over a number of usb_device values stored in the on stack
struct usb_device probed in usb_scan_device() to the final driver-model managed
struct usb_device in usb_child_pre_probe() through usb_device_platdata, and
then call usb_select_config() to fill in the rest.
There are 2
Since BIT macro is visiable to include/common.h there is no
need to define again it on local headers hence removed.
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
---
Changes for v2:
- none
arch/arm/include/asm/arch-am33xx/cpu.h | 1 -
On Wed, Apr 29, 2015 at 05:35:05PM +0530, Jagannadha Sutradharudu Teki wrote:
Replace (1 nr) to BIT(nr) where nr = 0, 1, 2 31
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Tom Rini tr...@konsulko.com
Cc: Simon
Use error-prone system timer implementation to simplify our code.
The generic code is proven and it is easier to maintain.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/mach-zynq/include/mach/hardware.h | 1 -
arch/arm/mach-zynq/timer.c | 83
Hi Michal,
On Wed, Apr 29, 2015 at 09:35:35AM +0100, Michal Simek wrote:
Added routine mmu_set_region_dcache_behaviour() to set a
particular region as non cacheable.
What's the intended use of this?
Define dummy routine for mmu_set_region_dcache_behaviour()
to handle incase of dcache off.
Hi Tom,
I’m working on rebasing an old U-Boot branch for our company’s AM335x
based board upon the current U-Boot release (v2015.04). Our branch was
initially based on the v2013.10 release (the ti/am335x/ board was
taken as reference).
After making all the code compile, I discovered there was a
Hi Tom,
I’m working on rebasing an old U-Boot branch for our company’s AM335x
based board upon the current U-Boot release (v2015.04). Our branch was
initially based on the v2013.10 release (the ti/am335x/ board was
taken as reference).
After making all the code compile, I discovered there was a
Hi Tom,
I'm working on rebasing an old U-Boot branch for our company's AM335x based
board upon the current U-Boot release (v2015.04). Our branch was initially
based on the v2013.10 release (the ti/am335x/ board was taken as reference).
After making all the code compile, I discovered there was
On Wed, Apr 29, 2015 at 09:30:17AM -0500, Rob Herring wrote:
On Wed, Apr 29, 2015 at 9:25 AM, Tom Rini tr...@konsulko.com wrote:
On Wed, Apr 29, 2015 at 09:11:03AM -0500, Rob Herring wrote:
[snip]
For arm64 Image, the image header defines the offset and u-boot must
load it to that
Hi Simon,
On Wed, Apr 29, 2015 at 8:30 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 28 April 2015 at 22:14, Joe Hershberger joe.hershber...@ni.com wrote:
The change to refactor these functions created a regression.
commit c1d6f91952d0761f61b0f0f96e4c7aa32eee2788
Author: Przemyslaw
On 04/27/2015 12:28 AM, shh@gmail.com wrote:
From: Shaohui Xie shaohui@freescale.com
1. board/freescale/t4qds/t4_rcw.cfg
1.8GHz support is requested as default frequency, so update the rcw.
2. remove un-used configs
configs/T4160QDS_SPIFLASH_defconfig
Convert sunxi-boards which use the sunxi-ehci code to the driver-model.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
board/sunxi/Kconfig | 3 ++
drivers/usb/host/ehci-sunxi.c | 95 ++-
2 files changed, 69 insertions(+), 29 deletions(-)
When calling into the hcd code in usb_scan_device() we do not yet have
the actual udevice for the device we are scanning, so we temporarily set
usb_device.dev to the parent.
This means that we cannot use usb_device.dev to accurately determine our
place in the usb topology when reading
Use the controller_dev pointer in the ehci hcd code rather then going up
the tree till we find the first UCLASS_USB device.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/usb/host/ehci-hcd.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git
On 2015-04-27, Fabio Estevam wrote:
Add HDMI output using PLL5 as the source for the IPU DI clocks,
and accurate VESA timings.
These settings are based on the patch from Soeren Moch sm...@web.de
submitted for the tbs2910 mx6 based board.
It allows the display to work properly at
Currently we copy over a number of usb_device values stored in the on stack
struct usb_device probed in usb_scan_device() to the final driver-model managed
struct usb_device in usb_child_pre_probe() through usb_device_platdata, and
then call usb_select_config() to fill in the rest.
There are 2
Hi All,
Here are a couple of dm-usb fixes and the dm conversion for sunxi-ehci,
note that this series is currently still RFC only as I'm still having some
issues with USB-1 devices not working which I need to investigate further.
I guess that some of the dm-usb fixed can be applied regardless as
I had a problem with the first patch in the V6 patchset (uclass-id.h sorted
list), but after I fixed that it all applied to u-boot-tegra/master OK. Just
need to find time to test it on my Nyan, unless someone else can say that
they've done that and it's good-to-go.
Tom
-Original
ccsr_ddr structure is already defined in fsl_immap.h. Remove
this duplicated define. Move fixed timing into ls1021atwr.h.
Signed-off-by: York Sun york...@freescale.com
CC: Alison Wang alison.w...@freescale.com
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 146 -
New QorIQ p1020 based board support from Arcturus Networks Inc.
http://www.arcturusnetworks.com/products/ucp1020/
Signed-off-by: Michael Durrant mdurr...@arcturusnetworks.com
Signed-off-by: Oleksandr G Zhadan ol...@arcturusnetworks.com
Series-version: 2
Series-changes: 2
WARNINGs: line
On 04/14/2015 08:59 AM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
On systems with caches enabled, NAND I/O may need to flush/invalidate
the cache during read/write operations. For this to work correctly, all
buffers must be cache-aligned. Fix nand_verify*() to allocate
On Wed, Apr 29, 2015 at 2:36 PM, Tom Rini tr...@konsulko.com wrote:
Well, lets look at it this way. You got it posted before the merge
window. Lets revisit this early July and see if this is still the
direction you want to go in mainline for the hardware.
Okay---that seems fair. Hopefully we
On Tue, Apr 28, 2015 at 05:50:53PM -0700, Ash Charles wrote:
Hi Tom,
There is actually an EEPROM on new boards that we'd like to use in the
future in order to detect that we should use DDR3 (and frankly,
everything will be DDR3 going forward). We still don't have
everything sorted in
Hi Vagrant,
On Wed, Apr 29, 2015 at 5:02 PM, Vagrant Cascadian vagr...@aikidev.net wrote:
I wasn't able to test this as the HDMI TV I'm using doesn't support this
resolution (it is admittedly ~9 years old, the closest resolution it
does support is 1280x720@60). How complicated would it be to
On Wed, Apr 29, 2015 at 3:02 PM, Vagrant Cascadian vagr...@aikidev.net wrote:
On 2015-04-27, Fabio Estevam wrote:
Add HDMI output using PLL5 as the source for the IPU DI clocks,
and accurate VESA timings.
These settings are based on the patch from Soeren Moch sm...@web.de
submitted for the
On Wed, 2015-04-29 at 15:20 -0600, Stephen Warren wrote:
On 04/14/2015 08:59 AM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
On systems with caches enabled, NAND I/O may need to flush/invalidate
the cache during read/write operations. For this to work correctly, all
On Wed, Apr 29, 2015 at 4:15 AM, Przemyslaw Marczak
p.marc...@samsung.com wrote:
Yes, it's good, that you mention that. The odroid_defconfig was tested only
on U3 and X2. You can found the info here: doc/README.odroid.
tested only on..., that I knew, but also knew the U2 and U3 both
used 4412
On Wed, Apr 29, 2015 at 3:02 PM, Vagrant Cascadian vagr...@aikidev.net wrote:
On 2015-04-27, Fabio Estevam wrote:
Add HDMI output using PLL5 as the source for the IPU DI clocks,
and accurate VESA timings.
These settings are based on the patch from Soeren Moch sm...@web.de
submitted for the
Hi Joe,
On 28 April 2015 at 22:14, Joe Hershberger joe.hershber...@ni.com wrote:
The change to refactor these functions created a regression.
commit c1d6f91952d0761f61b0f0f96e4c7aa32eee2788
Author: Przemyslaw Marczak p.marc...@samsung.com
Date: Wed Apr 15 13:07:17 2015 +0200
dm: core: add
Hi Fei,
On Wed, Apr 29, 2015 at 4:42 PM, WANG FEI wangfei.ji...@gmail.com wrote:
Thanks, Meng Bin, for your big help.
I'm not familiar with u-boot, so I even don't realize the BUILD_ROM flag
need to be changed, I just downloaded the u-boot-2015.04 source code and
build it with following
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
Since we do these sorts of operations a lot, it is useful to have a simpler
API, similar to clrsetbits_le32().
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
arch/x86/include/asm/msr.h
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
This permits init of additional CPU cores after relocation and when driver
model is ready.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
arch/x86/cpu/cpu.c| 37
Add a function similar to print_size() that works for frequencies. It can
handle from Hz to GHz.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Only display 2 digits of the fractional part, and round up when needed
Changes in v2:
- Correct bugs in number output
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
This driver supports multi-core init and sets up the CPU frequencies
correctly.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
arch/x86/cpu/baytrail/Makefile | 1 +
Hi Simon,
On Wed, Apr 29, 2015 at 9:32 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 28 April 2015 at 23:01, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
It is useful to be able to keep track of the available CPUs
On Wed, Apr 29, 2015 at 3:12 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi Rob,
On Tue, Apr 28, 2015 at 05:24:59PM -0500, Rob Herring wrote:
On Wed, Apr 22, 2015 at 8:04 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi,
I've been trying to use fastboot (and
Hi Bin,
On 29 April 2015 at 07:57, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
This driver supports multi-core init and sets up the CPU frequencies
correctly.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
We don't need to support really old x86 CPUs, so drop this code.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
arch/x86/cpu/lapic.c | 20
Hi Bin,
On 28 April 2015 at 23:01, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
It is useful to be able to keep track of the available CPUs in a multi-CPU
system. This uclass is mostly intended for use with SMP systems.
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
This driver supports multi-core init and sets up the CPU frequencies
correctly.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
arch/x86/cpu/baytrail/Makefile | 1 +
On Wed, Apr 29, 2015 at 9:25 AM, Tom Rini tr...@konsulko.com wrote:
On Wed, Apr 29, 2015 at 09:11:03AM -0500, Rob Herring wrote:
[snip]
For arm64 Image, the image header defines the offset and u-boot must
load it to that offset or you won't boot. There's only 1 correct
address and 2^32 -
On Wed, Apr 29, 2015 at 02:39:02AM +0200, Marek Vasut wrote:
The following changes since commit 1733259d25015c28c47990ec11af99b3f62f811c:
Merge branch 'master' of git://git.denx.de/u-boot-video (2015-04-20
09:13:52
-0400)
are available in the git repository at:
On Wed, Apr 29, 2015 at 11:45:44AM +0200, Michal Simek wrote:
Hi Tom,
please pull these zynq and zynqmp changes to your tree.
Thanks,
Michal
The following changes since commit cc555bd4f40a652471df4a3621d45ee57df0ca11:
Merge branch 'master' of git://git.denx.de/u-boot-spi
Don't use error-prone arch timer code and instead use system
timer implementation to simplify our code.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Fix commit message - Reported-by: Tom Rini tr...@konsulko.com
arch/arm/mach-zynq/include/mach/hardware.h | 1 -
Hi Simon,
On Wed, Apr 29, 2015 at 11:07 AM, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
This series adds a new CPU uclass which is intended to be useful on any
architecture. So far it has a very simple interface and a
On Wed, Apr 29, 2015 at 9:56 PM, Simon Glass s...@chromium.org wrote:
Add a function similar to print_size() that works for frequencies. It can
handle from Hz to GHz.
Signed-off-by: Simon Glass s...@chromium.org
---
Reviewed-by: Bin Meng bmeng...@gmail.com
Tested-by: Bin Meng
Hi Tom,
On 29 April 2015 at 07:08, Tom Rini tr...@konsulko.com wrote:
On Wed, Apr 29, 2015 at 05:35:05PM +0530, Jagannadha Sutradharudu Teki wrote:
Replace (1 nr) to BIT(nr) where nr = 0, 1, 2 31
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Masahiro Yamada
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
Enable the CPU uclass and Simple Firmware interface for Minnowbaord MAX. This
enables multi-core support in Linux.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
arch/x86/dts/minnowmax.dts | 20
On Tue, Apr 28, 2015 at 05:01:11PM +0200, Stefano Babic wrote:
Hi Tom,
please pull from u-boot-imx, thanks !
The following changes since commit f33cdaa4c3da4a8fd35aa2f9a3172f31cc887b35:
Prepare v2015.04 (2015-04-13 10:53:03 -0400)
are available in the git repository at:
On Tue, Apr 28, 2015 at 04:50:46PM -0600, Simon Glass wrote:
Hi Tom,
A few bug fixes.
The following changes since commit cc555bd4f40a652471df4a3621d45ee57df0ca11:
Merge branch 'master' of git://git.denx.de/u-boot-spi (2015-04-28
07:28:43 -0400)
are available in the git
On Wed, Apr 29, 2015 at 10:29:43AM +0200, Michal Simek wrote:
Hi Tom,
I have just this one small patch. Please apply.
Thanks,
Michal
The following changes since commit cc555bd4f40a652471df4a3621d45ee57df0ca11:
Merge branch 'master' of git://git.denx.de/u-boot-spi (2015-04-28
Hi Bin,
On 29 April 2015 at 08:42, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 11:07 AM, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
This series adds a new CPU uclass which is intended to be
Hi Bin,
On 28 April 2015 at 22:56, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
Add a function similar to print_size() that works for frequencies. It can
handle from Hz to GHz.
Signed-off-by: Simon Glass
Hi Simon,
On Wed, Apr 29, 2015 at 10:00 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 29 April 2015 at 07:57, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
This driver supports multi-core init and sets up the CPU
On Wed, Apr 29, 2015 at 09:11:03AM -0500, Rob Herring wrote:
[snip]
For arm64 Image, the image header defines the offset and u-boot must
load it to that offset or you won't boot. There's only 1 correct
address and 2^32 - 1 wrong addresses the boot.img could have.
Ok, so the simplest
Hi Bin,
On 29 April 2015 at 08:25, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:00 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 29 April 2015 at 07:57, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass
On Wednesday, April 29, 2015 at 07:12:10 AM, Siva Durga Prasad Paladugu wrote:
Update the ci_udc driver to support bulk transfer
and also added capability of having multiple dtds
if requested data is more than 16K.
These changes are tested for both the DFU and lthor.
Signed-off-by: Siva
Hi Jagan,
On 29 April 2015 at 08:58, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On 29 April 2015 at 20:12, Simon Glass s...@chromium.org wrote:
Hi Tom,
On 29 April 2015 at 07:08, Tom Rini tr...@konsulko.com wrote:
On Wed, Apr 29, 2015 at 05:35:05PM +0530, Jagannadha Sutradharudu
Hi,
Recently an eagle-eyed tester pointed out to me that the build time
reported in my u-boot build did not match the file timestamp on the
server it was stored on. This is because at $dayjob we have a build farm
with times set to UTC while the storage server was displaying the local
time. In
Hi Vasili,
On 29 April 2015 at 10:57, Vasili Galka vvv...@gmail.com wrote:
Hi Tom,
I’m working on rebasing an old U-Boot branch for our company’s AM335x
based board upon the current U-Boot release (v2015.04). Our branch was
initially based on the v2013.10 release (the ti/am335x/ board was
Define U_BOOT_TZ alongside U_BOOT_TIME and U_BOOT_DATE and use it to
include the timezone in the version output.
Signed-off-by: Chris Packham judge.pack...@gmail.com
---
Makefile | 3 ++-
include/version.h | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/Makefile
Hi Masahiro,
On 29 April 2015 at 19:19, Masahiro Yamada
yamada.masah...@socionext.com wrote:
Hi Bin,
(ccing Simon)
I guess scripts/get_maintainer.pl added my old email address
because the file you are touching was modified also by me before.
You can pass '-m' option to Patman
to prevent
Hi Hanna, Simon,
2015-04-29 12:05 GMT+09:00 Simon Glass s...@chromium.org:
+Masahiro (new address)
Hi Hanna,
On 27 April 2015 at 07:43, Hanna Hawa han...@marvell.com wrote:
Hi everyone,
I’m working on the latest u-boot 2015.04 trying to rebase my repository to
latest code.
I would
Hi Yehuda,
2015-04-29 14:23 GMT+09:00 Yehuda Yitschak yehu...@marvell.com:
Hey Simon, Masahiro
May I suggest an alternative solution to this issue.
What if each Kconfigs option could be set as y (compile for u-boot only )or
s (compile for u-boot and SPL)
Just as the kernel can set
York,
-Original Message-
From: York Sun [mailto:york...@freescale.com]
Sent: Thursday, April 30, 2015 1:36 AM
To: u-boot@lists.denx.de
Cc: Wang Huan-B18965; Sun York-R58495
Subject: [PATCH] arm/ls1021a: Remove ccsr_ddr from immap_ls102xa.h
ccsr_ddr structure is already defined in
Hi Bin,
(ccing Simon)
I guess scripts/get_maintainer.pl added my old email address
because the file you are touching was modified also by me before.
You can pass '-m' option to Patman
to prevent it from invoking get_maintainer.pl,
although it drops all the other recipients who should really be
On 04/27/2015 12:28 AM, shh@gmail.com wrote:
From: Shaohui Xie shaohui@freescale.com
1. board/freescale/t4qds/t4_rcw.cfg
1.8GHz support is requested as default frequency, so update the rcw.
2. remove un-used configs
configs/T4160QDS_SPIFLASH_defconfig
From: Fabio Estevam fabio.este...@freescale.com
Add HDMI output using PLL5 as the source for the IPU clocks,
and accurate VESA timings.
These settings are based on the patch from Soeren Moch sm...@web.de
submitted for the tbs2910 mx6 based board.
It allows the display to work properly at
From: Fabio Estevam fabio.este...@freescale.com
Enable USB Host1 port.
Signed-off-by: Rabeeh Khoury rab...@solid-run.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v1:
- Remove USB ether options as suggested by Tom
board/solidrun/mx6cuboxi/mx6cuboxi.c | 26
From: Fabio Estevam fabio.este...@freescale.com
There are users of Cuboxi and Hummingboard that use these boards without
connecting them to a USB/serial adapter.
Allow such usage by allowing the HDMI port to act as stdout and USB keyboard
as stdin.
The serial console still also works as
From: Fabio Estevam fabio.este...@freescale.com
Let Solidrun's logo appear on Cuboxi and Hummingboard by default.
Signed-off-by: Rabeeh Khoury rab...@solid-run.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Reviewed-by: Tom Rini tr...@konsulko.com
---
Changes since v1:
- None
For good measure, I should have posted those command outputs using
HK's old u-boot as well for comparison:
*
Exynos4412 # md.l 0x1000 0x1
1000: e4412220 A.
*Same
Exynos4412 # md.l 0x1180 0x1
1180: 0222.
*vs 0022
Exynos4412 # md.l 0x1188 0x1
1188:
Adds minimal DMA NAND driver for booting from NAND internal
memory. New config option SPL_NAND_SUPPORT is created for sunxi board,
which enables introduced driver and sets ENV_IS_NOWHERE (instead of
ENV_IS_IN_MMC).
NAND driver utilizes DMA interface to flash controller, which supports
Hi Ben,
On 27 Apr 2015 8:09 am, Ben Hewson b...@frazer-nash.com wrote:
Hi,
I am having some trouble and wondered if anyone has any suggestions.
I have a iMX6 (Quad core, 1Gb Ram) based board by Digi.com. It follows
pretty
closely the Sabrelite reference design.
I am trying to boot
Hi Bin,
On 29 Apr 2015 10:26 pm, Simon Glass s...@chromium.org wrote:
This series adds a new CPU uclass which is intended to be useful on any
architecture. So far it has a very simple interface and a command to show
CPU details.
This series also introduces multi-core init for x86. It is
On 28 April 2015 at 22:42, Bin Meng bmeng...@gmail.com wrote:
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
Before adding one more function, create a separate header to help reduce
the size of common.h. Add the missing function comments and tidy up.
Signed-off-by:
On 28 April 2015 at 23:16, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
This provides a way of passing information to Linux without requiring the
full ACPI horror. Provide a rudimentary implementation sufficient to be
On 28 April 2015 at 20:25, Simon Glass s...@chromium.org wrote:
When we start up additional CPUs we want them to use the same Global
Descriptor Table. Store the address of this in global_data so we can
reference it later.
Signed-off-by: Simon Glass s...@chromium.org
Reviewed-by: Bin Meng
On 28 April 2015 at 23:23, Bin Meng bmeng...@gmail.com wrote:
On Wed, Apr 29, 2015 at 10:25 AM, Simon Glass s...@chromium.org wrote:
Add a function to return the address of the Interrupt Descriptor Table.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
Enable the CPU uclass and Simple Firmware interface for Minnowbaord MAX. This
enables multi-core support in Linux.
Signed-off-by: Simon Glass s...@chromium.org
Reviewed-by: Bin Meng bmeng...@gmail.com
---
Changes in v3: None
Changes in v2: None
arch/x86/dts/minnowmax.dts | 20
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