On Oct 12, 2009, at 10:42 AM, Kim Phillips wrote:
On Mon, 12 Oct 2009 12:01:32 +0530
Dudhat Dipen-B09055 dipen.dud...@freescale.com wrote:
On Oct 9, 2009, at 12:42 PM, Dipen Dudhat wrote:
+void initsdram(void)
+{
+
+ volatile ccsr_ddr_t *ddr= (ccsr_ddr_t
*)CONFIG_SYS_MPC85xx_DDR_ADDR;
Hi Kumar,
I have tried using fsl_ddr_set_memctl_regs().
But this can't get fit into 4K NAND_SPL Loader.
Regards,
Dipen
On Oct 9, 2009, at 12:42 PM, Dipen Dudhat wrote:
+void initsdram(void)
+{
+
+volatile ccsr_ddr_t *ddr= (ccsr_ddr_t
*)CONFIG_SYS_MPC85xx_DDR_ADDR;
+int
On Mon, 12 Oct 2009 12:01:32 +0530
Dudhat Dipen-B09055 dipen.dud...@freescale.com wrote:
On Oct 9, 2009, at 12:42 PM, Dipen Dudhat wrote:
+void initsdram(void)
+{
+
+ volatile ccsr_ddr_t *ddr= (ccsr_ddr_t
*)CONFIG_SYS_MPC85xx_DDR_ADDR;
+ int d_init, dbw;
+ volatile
DDR support to boot from NAND/eSDHC/eSPI on P1 P2 RDB platforms.
Specifically this support needed when L2 Cache size is less than 512K.
Signed-off-by: Dipen Dudhat dipen.dud...@freescale.com
---
- Applies to http://git.denx.de/u-boot.git
- Changes from v2: integrated kumar's comments.
On Fri, Oct 09, 2009 at 11:12:04PM +0530, Dipen Dudhat wrote:
DDR support to boot from NAND/eSDHC/eSPI on P1 P2 RDB platforms.
Specifically this support needed when L2 Cache size is less than 512K.
If you're going to use this for eSDHC and eSPI, why is it sitting under
nand_spl?
-Scott
On Oct 9, 2009, at 12:42 PM, Dipen Dudhat wrote:
+void initsdram(void)
+{
+
+ volatile ccsr_ddr_t *ddr= (ccsr_ddr_t *)CONFIG_SYS_MPC85xx_DDR_ADDR;
+ int d_init, dbw;
+ volatile ccsr_gpio_t *pgpio = (void *)
(CONFIG_SYS_MPC85xx_GPIO_ADDR);
+ unsigned int ddr_size;
+
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Friday, October 09, 2009 11:51 PM
To: Dudhat Dipen-B09055
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH v3 3/3] ppc/p1_p2_RDB: DDR Relocation
support for NAND/SD/eSPI Boot
On Oct 9, 2009, at 12:42 PM
On Oct 9, 2009, at 3:19 PM, Dudhat Dipen-B09055 wrote:
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Friday, October 09, 2009 11:51 PM
To: Dudhat Dipen-B09055
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH v3 3/3] ppc/p1_p2_RDB: DDR
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