While locally preparing some U-Boot patches for ARM based OMAP3 boards, some
using OneNAND and some using NAND, we found some differences in OneNAND and
NAND command address handling.
As this might confuse users (it already confused us), we like to align OneNAND
and NAND address handling.
The
Dear Dirk,
In message [EMAIL PROTECTED] you wrote:
While locally preparing some U-Boot patches for ARM based OMAP3 boards, some
using OneNAND and some using NAND, we found some differences in OneNAND and
NAND command address handling.
As this might confuse users (it already confused us), we
Dear Roy Zang,
In message [EMAIL PROTECTED] you wrote:
From: Roy Zang [EMAIL PROTECTED]
Add mpc7448hpc2 maintainer information for future maintained.
Signed-off-by: Roy Zang [EMAIL PROTECTED]
---
MAINTAINERS |4
1 files changed, 4 insertions(+), 0 deletions(-)
Applied,
PLB4 Crossbar Arbiter core is instantiated on 405EX/ 440EP/ 440EPx/ 440GR/
440GRx/ 440SP/ 440SPe/ 460EX/ 460GT
For optimal performance, the read pipeline depth must be set to 4.
The current code enables it only for bamboo, sequoia and yosemite boards.
Better approach is to define
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