Re: [U-Boot] [U-Boot,2/5] power: pmic: rk816: support rk816 pmic

Hi Simon, Philipp, On 09/18/2017 01:52 AM, Simon Glass wrote: Hi, On 13 September 2017 at 14:22, Philipp Tomsich <philipp.toms...@theobroma-systems.com> wrote: On Wed, 13 Sep 2017, Kever Yang wrote: From: Elaine Zhang <zhangq...@rock-chips.com> Add Rockchip pmic rk816 supp

[U-Boot] [PATCH v2 1/5] rockchip: i2c: rk3328: support i2c for rk3328 SoC

From: Elaine Zhang <zhangq...@rock-chips.com> Add compatible to support rk3328 i2c Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Revi

[U-Boot] [PATCH v2 3/5] power: pmic: rk805: support rk805 pmic

; Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - add introduce info for RK816 in commit message drivers/power/pmic/rk8xx.c | 1 + drivers/power/regulator/rk8xx.c | 6 ++ include/power/rk8xx_pmic.h | 1 + 3 files changed, 8 insertions(+) diff --git a/

[U-Boot] [PATCH v2 2/5] power: pmic: rk816: support rk816 pmic

/write safety. The RK816 most used with rk312x/rk322x/rk332x SoCs. Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - add introduce info for RK816 in commit message drivers/power/pmic/rk8xx.c |

[U-Boot] [PATCH v2 4/5] configs: rk3328: add support for pmic rk8xx and regulator and i2c driver

From: Elaine Zhang <zhangq...@rock-chips.com> Add defconfig for rk8xx and regulator and i2c controller. Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-

[U-Boot] [PATCH v2 5/5] rockchip: dts: rk3328-evb: add i2c1 and rk805 nodes

From: Elaine Zhang <zhangq...@rock-chips.com> add i2c1 and rk805 nodes to support rk805 init setting. Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-

Re: [U-Boot] [PATCH] rockchip: clk: rk3368: always run rkclk_init when driver probe

Hi Philipp, On 08/31/2017 06:25 PM, Andy Yan wrote: Hi Philipp: On 2017年08月28日 04:21, Dr. Philipp Tomsich wrote: On 23 Aug 2017, at 09:26, Andy Yan wrote: commit 4bebf94e8544("rockchip: clk: rk3368: do not change CPLL/GPLL before returning to BROM") limits the pll

[U-Boot] [PATCH v2 0/4] move rockchip sdram driver to driver/ram

move all the Rockchip sdram driver which support CONFIG_RAM into driver/ram folder Series 2 is a rebase based on u-boot-rockchip master branch. Kever Yang (4): rockchip: rk3399: move sdram driver to driver/ram rockchip: rk3188: move sdram driver to driver/ram rockchip: rk3288: move sdram

[U-Boot] [PATCH v2 1/4] rockchip: rk3399: move sdram driver to driver/ram

Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> -

[U-Boot] [PATCH v2 2/4] rockchip: rk3188: move sdram driver to driver/ram

Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> -

[U-Boot] [PATCH v2 3/4] rockchip: rk3288: move sdram driver to driver/ram

Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> -

[U-Boot] [PATCH v2 4/4] rockchip: rk3328: move sdram driver to driver/ram

Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> -

[U-Boot] [PATCH v4 0/2] rockchip: rk3229: add sdram and sd support

Add sdram driver for rk3229 and other fix like pinctrl and sd node. Changes in v4: - rebase on u-boot-rockchip master with patchset "move rockchip sdram driver to driver/ram" Changes in v3: - move rk332x sdram driver to driver/ram - do the ram init in TPL instad of SPL Kev

[U-Boot] [PATCH v4 1/2] rockchip: rk322x: add sdram driver

Add driver for rk322x to support sdram initialize in SPL. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v4: - rebase on u-boot-rockchip master with patchset "move rockchip sdram driver to driver/ram" Changes in v3: - move rk332x sdram driver to driver/

[U-Boot] [PATCH v4 2/2] rockchip: dts: rk3229: remove dram channel info

The dram channel info will be auto detect by the driver, we do not need it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v4: None Changes in v3: None arch/arm/dts/rk3229-evb.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/dts/rk3229-evb.dts b/ar

[U-Boot] [PATCH] rockchip: clk: fix typo in rk322x clock driver

Fix typo RK322X/RK3036 in rk322x clock driver. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- drivers/clk/rockchip/clk_rk322x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c index 4

[U-Boot] [PATCH] rockchip: rk3036: fix grf macro define

Some of macros definition are not correct, fix them according to TRM. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/include/asm/arch-rockchip/grf_rk3036.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk

[U-Boot] [PATCH] rockchip: mkimage: add support for rk3128 soc

Add support for rk3128 package header in mkimage tool. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- tools/rkcommon.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/rkcommon.c b/tools/rkcommon.c index 04e8272..1a24e16 100644 --- a/tools/rkcommon.c +++ b/tools/rkco

[U-Boot] [PATCH 0/8] rockchip: add new SoC support for RK3128

and display will be later. Kever Yang (8): rockchip: rk3128: add device tree file rockchip: rk3128: add soc basic support rockchip: rk3128: add clock driver rockchip: rk3128: add pinctrl driver rockchip: rk3128: add sysreset driver rockchip: rk3128: add evb-rk3128 support rockchip: rk3128

[U-Boot] [PATCH 1/8] rockchip: rk3128: add device tree file

Add dts binding header for rk3128, files origin from kernel. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3128-evb.dts| 77 arch/arm/dts/rk3128.dtsi

[U-Boot] [PATCH 5/8] rockchip: rk3128: add sysreset driver

Add rk3128 sysreset driver. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_rk3128.c | 45 ++ 2 files changed, 46 insertions(+) create mode 100644 drivers/sysreset/sysreset_

[U-Boot] [PATCH 2/8] rockchip: rk3128: add soc basic support

RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host and device, HDMI/LVDS/MIPI display. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/mach-rockchip/Kconfig| 10 ++ arch/ar

[U-Boot] [PATCH 4/8] rockchip: rk3128: add pinctrl driver

Add rk3128 pinctrl driver and grf/iomux structure definition. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/include/asm/arch-rockchip/grf_rk3128.h | 551 drivers/pinctrl/Kconfig | 10 + drivers/pinctrl/rockchip/Ma

[U-Boot] [PATCH 3/8] rockchip: rk3128: add clock driver

Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/include/asm/arch-rockchip/cru_rk3128.h | 173 arch/arm/mach-rockchip/rk3128/Makefile | 1 + arch/arm/mach-rockchip/rk3128/clk_rk3128.c

[U-Boot] [PATCH 6/8] rockchip: rk3128: add evb-rk3128 support

evb-rk3128 is an evb from Rockchip based on rk3128 SoC: - 2 USB2.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/mach-rockchip/rk3128/Kconfig

[U-Boot] [PATCH 7/8] rockchip: rk3128: add defconfig for evb-rk3128

Enable board config for evb-rk3128. Serial output and eMMC works in this version. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- configs/evb-rk3128_defconfig | 42 ++ 1 file changed, 42 insertions(+) create mode 100644 confi

[U-Boot] [PATCH 8/8] rockchip: rk3128: add sdram driver

RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width. This patch is only used for U-Boot, but not for SPL which will comes later, maybe after we merge all the common code into a common file. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- drivers/ram/rockchip/Ma

Re: [U-Boot] [PATCH 00/10] rockchip: add tpl and OPTEE support for rk3229

, Heiko Stübner wrote: Hi Kever, Am Mittwoch, 6. September 2017, 10:14:27 CET schrieb Kever Yang: Add some generic options for TPL support for arm 32bit, and then and TPL support for rk3229(cortex-A7), and then add OPTEE support in SPL. I was now finally able to test this series and I'm getting mixed

Re: [U-Boot] [U-Boot, 1/3] rockchip: rk3036: fix pll config for correct frequency

Philipp, On 11/28/2017 09:44 PM, Philipp Tomsich wrote: On Tue, 28 Nov 2017, Kever Yang wrote: There is a fixed div-2 between PLL and clk_ddr/clk_ddrphy, so we need to double to pll output and then ddr can work in correct frequency. Signed-off-by: Kever Yang <kever.y...@rock-chips.

[U-Boot] [PATCH v2 1/2] drivers/reset: support rockchip reset drivers

} reset_assert(_ctl); udelay(50); reset_deassert(_ctl); i2c dts node: resets = < SRST_P_I2C1>, < SRST_I2C1>; reset-names = "p_i2c", "i2c"; Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <kever.

[U-Boot] [PATCH v2 2/2] rockchip: clk: bind reset driver

From: Elaine Zhang <zhangq...@rock-chips.com> Bind rockchip reset to clock-controller with rockchip_reset_bind(). Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - use rockchip_reset_bind() to

Re: [U-Boot] [U-Boot, RESEND, 1/2] drivers/reset: support rockchip reset drivers

Philipp, On 11/22/2017 06:52 AM, Philipp Tomsich wrote: On Fri, 3 Nov 2017, Kever Yang wrote: From: Elaine Zhang <zhangq...@rock-chips.com> Create driver to support all Rockchip SoCs soft reset. Example of usage: i2c driver: ret = reset_get_by_name(dev, "i2c", _c

[U-Boot] [PATCH v2 0/7] rockchip: add new SoC support for RK3128

T - enable usb nodes Kever Yang (7): rockchip: rk3128: add device tree file rockchip: rk3128: add soc basic support rockchip: rk3128: add clock driver rockchip: rk3128: add pinctrl driver rockchip: rk3128: add evb-rk3128 support rockchip: rk3128: add defconfig for evb-rk3128 rockchip: r

[U-Boot] [PATCH v2 1/7] rockchip: rk3128: add device tree file

Add dts binding header for rk3128, files origin from kernel. Series-Changes: 2 - fix i2c address - add saradc and usb phy node - emmc using fifo mode for there is no dma support in rk3128 emmc - add some clock id in cru.h Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes

[U-Boot] [PATCH v2 3/7] rockchip: rk3128: add clock driver

Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - add clock for saradc, vop, nandc, i2c - update driver bind for sysreset driver and reset driver - add "rockchip,rk3126-cru" for compatible arch/arm/

[U-Boot] [PATCH v2 7/7] rockchip: rk3128: add sdram driver

RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width. This patch is only used for U-Boot, but not for SPL which will comes later, maybe after we merge all the common code into a common file. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: None d

[U-Boot] [PATCH v2 4/7] rockchip: rk3128: add pinctrl driver

Add rk3128 pinctrl driver and grf/iomux structure definition. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - remove debug info - update GPIO2C4/C5 SHIFT arch/arm/include/asm/arch-rockchip/grf_rk3128.h | 551 drivers/pinctrl/K

[U-Boot] [PATCH v2 6/7] rockchip: rk3128: add defconfig for evb-rk3128

Enable board config for evb-rk3128. Serial output and eMMC works in this version. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: None configs/evb-rk3128_defconfig | 56 1 file changed, 56 insertions(+) create mode

Re: [U-Boot] [U-Boot, RESEND, 2/2] rockchip: clk: add device_bind_driver_to_node for reset driver

Philipp, On 11/22/2017 06:55 AM, Philipp Tomsich wrote: On Fri, 3 Nov 2017, Kever Yang wrote: From: Elaine Zhang <zhangq...@rock-chips.com> all rockchip socs add device_bind_driver_to_node, to bound device rockchip reset to clock-controller. Signed-off-by: Elaine Zhang <zhang

[U-Boot] [PATCH v2 2/7] rockchip: rk3128: add soc basic support

RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host and device, HDMI/LVDS/MIPI display. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - update setup_boot_mode() with master - enable board_lat

[U-Boot] [PATCH v2 5/7] rockchip: rk3128: add evb-rk3128 support

evb-rk3128 is an evb from Rockchip based on rk3128 SoC: - 2 USB2.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - enable usb nodes arch/arm/mach-rockchip/rk3128/K

[U-Boot] [PATCH 3/3] rockchip: rk3036: sdram: correct setting for pll integer mode

According to rk3036 TRM, should be set to '1' for the pll integer mode, while the '0' means the frac mode. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/ar

[U-Boot] [PATCH v3 3/7] rockchip: rk3128: add clock driver

Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v3: - remove soft

[U-Boot] [PATCH v3 1/7] rockchip: rk3128: add device tree file

Add dts binding header for rk3128, files origin from kernel. Series-Changes: 2 - fix i2c address - add saradc and usb phy node - emmc using fifo mode for there is no dma support in rk3128 emmc - add some clock id in cru.h Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: P

[U-Boot] [PATCH v3 7/7] rockchip: rk3128: add sdram driver

RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width. This patch is only used for U-Boot, but not for SPL which will comes later, maybe after we merge all the common code into a common file. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp T

[U-Boot] [PATCH v3 6/7] rockchip: rk3128: add defconfig for evb-rk3128

Enable board config for evb-rk3128. Serial output and eMMC works in this version. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- C

[U-Boot] [RESEND PATCH v3 1/7] rockchip: rk3128: add device tree file

Add dts binding header for rk3128, files origin from kernel. Series-Changes: 2 - fix i2c address - add saradc and usb phy node - emmc using fifo mode for there is no dma support in rk3128 emmc - add some clock id in cru.h Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: P

[U-Boot] [RESEND PATCH v3 6/7] rockchip: rk3128: add defconfig for evb-rk3128

Enable board config for evb-rk3128. Serial output and eMMC works in this version. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- C

[U-Boot] [RESEND PATCH v3 5/7] rockchip: rk3128: add evb-rk3128 support

evb-rk3128 is an evb from Rockchip based on rk3128 SoC: - 2 USB2.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com&

[U-Boot] [RESEND PATCH v3 7/7] rockchip: rk3128: add sdram driver

RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width. This patch is only used for U-Boot, but not for SPL which will comes later, maybe after we merge all the common code into a common file. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp T

[U-Boot] [PATCH 2/3] rockchip: rk3036: update clock driver for ddr

After the MASK MACRO update, we need to update the driver at the same time. This is a fix to: 37943aa rockchip: rk3036: clean mask definition for cru reg Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 15 ++- 1 file c

[U-Boot] [PATCH 1/3] rockchip: rk3036: fix pll config for correct frequency

There is a fixed div-2 between PLL and clk_ddr/clk_ddrphy, so we need to double to pll output and then ddr can work in correct frequency. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 2 +- 1 file changed, 1 insertion(+), 1 de

[U-Boot] [PATCH v3 0/7] rockchip: add new SoC support for RK3128

"rockchip,rk3126-cru" for compatible - remove debug info - update GPIO2C4/C5 SHIFT - enable usb nodes Kever Yang (7): rockchip: rk3128: add device tree file rockchip: rk3128: add soc basic support rockchip: rk3128: add clock driver rockchip: rk3128: add pinctrl driver rockchip: r

[U-Boot] [PATCH v3 4/7] rockchip: rk3128: add pinctrl driver

Add rk3128 pinctrl driver and grf/iomux structure definition. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v3:

[U-Boot] [PATCH v3 2/7] rockchip: rk3128: add soc basic support

RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host and device, HDMI/LVDS/MIPI display. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com&

[U-Boot] [PATCH v3 5/7] rockchip: rk3128: add evb-rk3128 support

evb-rk3128 is an evb from Rockchip based on rk3128 SoC: - 2 USB2.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com&

[U-Boot] [RESEND PATCH v3 2/7] rockchip: rk3128: add soc basic support

RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host and device, HDMI/LVDS/MIPI display. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com&

[U-Boot] [RESEND PATCH v3 0/7] rockchip: add new SoC support for RK3128

k3126-cru" for compatible - remove debug info - update GPIO2C4/C5 SHIFT - enable usb nodes Kever Yang (7): rockchip: rk3128: add device tree file rockchip: rk3128: add soc basic support rockchip: rk3128: add clock driver rockchip: rk3128: add pinctrl driver rockchip: rk3128: add

[U-Boot] [RESEND PATCH v3 4/7] rockchip: rk3128: add pinctrl driver

Add rk3128 pinctrl driver and grf/iomux structure definition. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v3:

[U-Boot] [RESEND PATCH v3 3/7] rockchip: rk3128: add clock driver

Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v3: - remove soft

[U-Boot] [PATCH v2 2/3] rockchip: rk3036: update clock driver for ddr

After the MASK MACRO update, we need to update the driver at the same time. This is a fix to: 37943aa rockchip: rk3036: clean mask definition for cru reg Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed

[U-Boot] [PATCH v2 3/3] rockchip: rk3036: sdram: correct setting for pll integer mode

According to rk3036 TRM, should be set to '1' for the pll integer mode, while the '0' means the frac mode. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobr

[U-Boot] [PATCH v2 1/3] rockchip: rk3036: fix pll config for correct frequency

There is a fixed div-2 between PLL and clk_ddr/clk_ddrphy, so we need to double to pll output and then ddr can work in correct frequency. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Reviewed-by: Phi

[U-Boot] [PATCH v3] rockchip: update boot0 hook

1f')+'b reset' + ARM_VECTORS armv7 U-Boot: ARM_VECTORS armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399) armv8 U-Boot: 'b reset' Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: - address comments from Philipp Changes in v2: - update commit message

[U-Boot] [PATCH] rockchip: update ROCKCHIP_SPL_RESERVE_IRAM to 0

Only rk3399 atf need ROCKCHIP_SPL_RESERVE_IRAM, so update it dtfault 0 so that other SoCs do not need to define it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/mach-rockchip/Kconfig | 2 +- configs/evb-rk3399_defconfig | 1 + configs/firefly-rk3399_defconf

[U-Boot] [PATCH v4 2/2] rockchip: clk: bind reset driver

From: Elaine Zhang <zhangq...@rock-chips.com> Bind rockchip reset to clock-controller with rockchip_reset_bind(). Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v4: - fix compile error if CON

[U-Boot] [PATCH v4 1/2] drivers/reset: support rockchip reset drivers

} reset_assert(_ctl); udelay(50); reset_deassert(_ctl); i2c dts node: resets = < SRST_P_I2C1>, < SRST_I2C1>; reset-names = "p_i2c", "i2c"; Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <keve

[U-Boot] [PATCH v3 00/11] rockchip: add tpl and OPTEE support for rk3229

type like ATF - Using new image type for op-tee - Make the its as common file used for all armv7 with op-tee - update defconfig option Kever Yang (11): lib: add TPL_OF_LIBFDT option for TPL arm: add option for TPL ARCH_MEM in arm 32bit arm: add a separate stack for TPL rockchip: rk322x

Re: [U-Boot] [PATCH v2 00/11] rockchip: add tpl and OPTEE support for rk3229

Hi Philipp, This patch 4/11 is not correct, it can not pass the buildman, I will send a new version, pls ignore this version. Thanks, - Kever On 12/19/2017 04:18 PM, Kever Yang wrote: Add some generic options for TPL support for arm 32bit, and then and TPL support for rk3229(cortex-A7

[U-Boot] [PATCH v2 00/11] rockchip: add tpl and OPTEE support for rk3229

- Make the its as common file used for all armv7 with op-tee - update defconfig option Kever Yang (11): lib: add TPL_OF_LIBFDT option for TPL arm: add option for TPL ARCH_MEM in arm 32bit arm: add a separate stack for TPL rockchip: rk322x: enable tpl support sysreset: enable driver

[U-Boot] [PATCH v3 1/3] rockchip: add a common script for generate fit its

. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: - use python script - adapt for latest spl atf support Changes in v2: None arch/arm/mach-rockchip/make_fit_atf.py | 221 + 1 file changed, 221 insertions(+) create mode 100755 ar

Re: [U-Boot] [U-Boot, 07/15] spl: atf: introduce spl_invoke_atf and make bl31_entry private

Hi Philipp, This patch use fdt_addr as plat_params, break the compatible with upstream ATF, and get error: "ERROR: not expected type found 6410029648624618960" The ATF do have a requirement for plat_params structure, and fdt_addr does not match this: /* common header for all plat

[U-Boot] [PATCH v3 3/3] rockchip: evb-rk3399: update document for board bring up

Since we support ATF in SPL and add script for it, let's make the document up to date. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v3: - update addr for uboot.itb to 0x4000 Changes in v2: - t

[U-Boot] [PATCH v3 2/3] rockchip: firefly-rk3399: add FIT for rk3399

Enable SPL_FIT_GENERATOR with path for it. With this patch you can get u-boot.itb for rk3399-firefly with: > make u-boot.itb Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Reviewed-by: Mark Kettenis <kette...@openbsd.org> Tested-by: Mark Kettenis <kette...@openbsd.org&g

[U-Boot] [PATCH] spl: atf: fix the plat_params

f and make bl31_entry private Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- common/spl/spl_atf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c index 63557c0..a65d603 100644 --- a/common/spl/spl_atf.c +++ b/comm

Re: [U-Boot] [PATCH 2/2] disk: part: use common api to lookup part driver

Hi Philipp, On 12/14/2017 05:53 PM, Dr. Philipp Tomsich wrote: Kever, On 14 Dec 2017, at 07:39, Kever Yang <kever.y...@rock-chips.com> wrote: Do not need to scan disk every time when we get part info by name. How does this interact with USB devices? I.e.: what happens, when y

Re: [U-Boot] rockchip: config: update part table

Hi Philipp, Yes, this is required, we do not need to show the reserved partitions to users. Thanks, - Kever On 11/20/2017 10:52 PM, Philipp Tomsich wrote: On Tue, 31 Oct 2017, Kever Yang wrote: User do not need to access the reserved part in system, remove them from partition table

[U-Boot] [PATCH v3 1/2] drivers/reset: support rockchip reset drivers

} reset_assert(_ctl); udelay(50); reset_deassert(_ctl); i2c dts node: resets = < SRST_P_I2C1>, < SRST_I2C1>; reset-names = "p_i2c", "i2c"; Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <kever

[U-Boot] [PATCH v3 2/2] rockchip: clk: bind reset driver

From: Elaine Zhang <zhangq...@rock-chips.com> Bind rockchip reset to clock-controller with rockchip_reset_bind(). Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: - add missing offset for rk3399 pm

[U-Boot] [PATCH v2] rockchip: update boot0 hook

1f')+'b reset' + ARM_VECTORS armv7 U-Boot: ARM_VECTORS armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399) armv8 U-Boot: 'b reset' Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - update commit message arch/arm/include/asm/arch-rockchip/boot0.

Re: [U-Boot] rk3288: broken boot

Hi Jagan, Could you enable global DEBUG and share the log? Thanks, - Kever On 12/15/2017 03:08 PM, Jagan Teki wrote: Hi Philipp/Kever, Issue observed on rk3288 TPL supported board (vyasa), worked on previous release v2017.11. Tried to bisect but i couldn't do it because of changes in

Re: [U-Boot] [PATCH 00/10] rockchip: add tpl and OPTEE support for rk3229

Heiko, On 11/21/2017 05:25 AM, Heiko Stübner wrote: Hi Kever, Am Mittwoch, 6. September 2017, 10:14:27 CET schrieb Kever Yang: Add some generic options for TPL support for arm 32bit, and then and TPL support for rk3229(cortex-A7), and then add OPTEE support in SPL. I was now finally able

[U-Boot] [PATCH 2/2] disk: part: use common api to lookup part driver

Do not need to scan disk every time when we get part info by name. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- disk/part.c | 29 + 1 file changed, 13 insertions(+), 16 deletions(-) diff --git a/disk/part.c b/disk/part.c index b007138..96c2858

[U-Boot] [PATCH 1/2] disk: part: scan the disk if the part_type is unknow

We can get the new part table when we write a new partition table to a blank disk with this patch, or else we have to reset the board to get new partition table. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- disk/part.c | 24 ++-- 1 file changed, 18 inse

[U-Boot] [PATCH] rockchp: dts: rk3399-evb: support boot from sd-card

Enable sdmmc node in SPL and add it to boot order. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm/dts/rk3399-evb.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index 0e5d8d7..f0567c9 100644 --- a/ar

Re: [U-Boot] [PATCH] spl: atf: fix the plat_params

been test by our QA. BUT, open source community always get a BROKEN version from upstream :( The upstream source code should have a good support for the boards already upstream, but it broken very frequently. Thanks, - Kever Thanks, Philipp. On 15 Dec 2017, at 04:27, Kever Yang <kever.y...@r

[U-Boot] [PATCH v3 03/11] arm: add a separate stack for TPL

TPL stack may different from SPL and sys stack, add support for separate one when the board defines it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: None Changes in v2: None arch/arm/lib/crt0.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff

[U-Boot] [PATCH v3 02/11] arm: add option for TPL ARCH_MEM in arm 32bit

Some options like TPL_SYS_THUMB_BUILD, TPL_USE_ARCH_MEMCPY and TPL_USE_ARCH_MEMCPY are needed for TPL build in 32bit arm. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: None Changes in v2: - update subject with ARCH_MEM info arch/arm/Kconfi

[U-Boot] [PATCH v3 01/11] lib: add TPL_OF_LIBFDT option for TPL

TPL may need use libfdt for dt decode, add option for it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: None Changes in v2: None lib/Kconfig | 10 ++ 1 file changed, 10 insertions(+) diff --git a/lib/Kconfig b/lib/Kconfig index f447c53..b43ef22

[U-Boot] [PATCH v3 05/11] sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: None Changes in v2: None drivers/sysreset/Kconfig | 18 ++ drivers/sysreset/Makefile | 2 +- 2 files changed, 19 insertions

[U-Boot] [PATCH v3 08/11] rockchip: rk322x: dts: enable uart2 for SPL/TPL

When we use DM_SERIAL for serial driver, we need enable the dts node for the debug console. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: None Changes in v2: None arch/arm/dts/rk3229-evb.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/

[U-Boot] [PATCH v2 01/11] lib: add TPL_OF_LIBFDT option for TPL

TPL may need use libfdt for dt decode, add option for it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: None lib/Kconfig | 10 ++ 1 file changed, 10 insertions(+) diff --git a/lib/Kconfig b/lib/Kconfig index f447c53..b43ef22 100644 --- a/lib/Kconfig

[U-Boot] [PATCH v2 07/11] spl: add support to booting with OP-TEE

arguments' for detail entry parameter in: core/arch/arm/kernel/generic_entry_a32.S Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - Using new image type for op-tee common/spl/Kconfig | 7 +++ common/spl/Makefile| 1 + common/spl/spl.c | 8

[U-Boot] [PATCH v2 09/11] rockchip: add fit source file for pack itb with op-tee

We package U-Boot and OP-TEE into one itb file for SPL, so that we can support OP-TEE in SPL. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - Make the its as common file used for all armv7 with op-tee arch/arm/mach-rockchip/fit_spl_optee.it

[U-Boot] [PATCH v2 10/11] rockchip: evb-rk3229: add README file for OP-TEE support

Detail of step by step to bring up the board with OP-TEE support. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: None board/rockchip/evb_rk3229/README | 72 1 file changed, 72 insertions(+) create mode 100644 board/ro

[U-Boot] [PATCH v2 11/11] rockchip: evb-rk322x: update defconfig with tpl and optee support

Enable all the options for TPL/SPL and OPTEE. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - update defconfig option configs/evb-rk3229_defconfig | 26 +++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/confi

[U-Boot] [PATCH v2 06/11] image: add os type for OP-TEE

OP-TEE is an open source trust OS maintained here: https://github.com/OP-TEE/optee_os Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - Add new image type like ATF common/image.c | 1 + include/image.h | 1 + 2 files changed, 2 insertions(+) diff --git a/

[U-Boot] [PATCH v2 08/11] rockchip: rk322x: dts: enable uart2 for SPL/TPL

When we use DM_SERIAL for serial driver, we need enable the dts node for the debug console. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: None arch/arm/dts/rk3229-evb.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/a

[U-Boot] [PATCH v3 04/11] rockchip: rk322x: enable tpl support

Move original spl to tpl, and add spl to load next stage firmware, adapt all the address and option for them. Serial-changes: 2 - update upon latest source Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: - do not init ddr region in spl Changes in v2: None ar

[U-Boot] [PATCH v2 03/11] arm: add a separate stack for TPL

TPL stack may different from SPL and sys stack, add support for separate one when the board defines it. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: None arch/arm/lib/crt0.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/lib/cr

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