On 20/03/12 23:58, Joel Holdsworth wrote: > Paulo has chinese contacts who seems to be able to manufacture things > very cheap. I asked him about this, because I've been trying to > investigate how easy/cheap it would be to build a low cost (open?) > >=500MHz logic analyser with an Fx2 and an FPGA doing sample > compression, specially designed with the sigrok community in mind. I > asked him if he'd be interested in working with me to develop such a > product. I would say he is interested, but it's early days yet.
It's been discussed a couple of times on IRC, and it's clear that the time is right for this: the openbench logic sniffer project has died, at least on the hardware side. Like you, I also have a few ideas regarding this. The general idea of an FPGA doing sampling into fast RAM, compression into slower RAM (but lots of it), and a separate USB interface chip taking care of interfacing to a USB host is solid, in my opinion. I believe there are lots of people ready to contribute to such a project, particularly if it has some momentum, and doesn't get bogged down in forums and Windows-only development tools. But what's needed is for somebody to step up and pull this. It needs somebody willing to take it on, alone if need be, and stick with it for some years. I really like the idea of this happening within the sigrok project, but it doesn't have to, of course. -- Bert Vermeulen [email protected] ------------------------------------------------------------------------------ This SF email is sponsosred by: Try Windows Azure free for 90 days Click Here http://p.sf.net/sfu/sfd2d-msazure _______________________________________________ sigrok-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/sigrok-devel
