This is a note to let you know that I've just added the patch titled

    ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.

to the 3.0-stable tree which can be found at:
    
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-7014-1-cache-l2x0-fix-l2-cache-size-calculation.patch
and it can be found in the queue-3.0 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <sta...@kernel.org> know about it.


>From 43c734be5571a4daad9f0a3e0b3229a1c0049917 Mon Sep 17 00:00:00 2001
From: Srinivas Kandagatla <srinivas.kandaga...@st.com>
Date: Mon, 15 Aug 2011 10:43:44 +0100
Subject: ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.

From: Srinivas Kandagatla <srinivas.kandaga...@st.com>

commit 43c734be5571a4daad9f0a3e0b3229a1c0049917 upstream.

This patch fixes L2 Cache size calculations for L2C-210, L2C-310 and
PL310, by changing the L2X0_AUX_CTRL_WAY_SIZE_MASK from 2 bits to 3
bits.

The Auxiliary Control Register for L2C-210, L2C-310 and PL310 has 3bits
[19:17] for Way size, however the existing code only uses 2 bits to
get this value. This results in incorrect cachesize calculations.

It also results in performing operations on the whole cache when we
erroneously decide that the range is big enough (due to l2x0_size being
too small) and also prints incorrect cachesize.

Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@st.com>
Acked-by: Will Deacon <will.dea...@arm.com>
Signed-off-by: Russell King <rmk+ker...@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gre...@suse.de>

---
 arch/arm/include/asm/hardware/cache-l2x0.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -64,7 +64,7 @@
 #define L2X0_AUX_CTRL_MASK                     0xc0000fff
 #define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT      16
 #define L2X0_AUX_CTRL_WAY_SIZE_SHIFT           17
-#define L2X0_AUX_CTRL_WAY_SIZE_MASK            (0x3 << 17)
+#define L2X0_AUX_CTRL_WAY_SIZE_MASK            (0x7 << 17)
 #define L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT     22
 #define L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT                26
 #define L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT                27


Patches currently in stable-queue which might be from 
srinivas.kandaga...@st.com are

queue-3.0/arm-7014-1-cache-l2x0-fix-l2-cache-size-calculation.patch

_______________________________________________
stable mailing list
stable@linux.kernel.org
http://linux.kernel.org/mailman/listinfo/stable

Reply via email to