On Mon, Aug 08, 2022 at 02:52:37AM -0500, Scott Cheloha wrote: > One thing I'm still uncertain about is how glxclk fits into the > loongson picture. It's an interrupt clock that runs hardclock() and > statclock(), but the code doesn't do any logical masking, so I don't > know whether or not I need to adjust anything in that code or account > for it at all. If there's no logical masking there's no deferral, so > it would never call need to call md_triggerclock() from splx(9).
I think the masking of glxclk interrupts are handled by the ISA interrupt code. The patch misses md_triggerclock definition in mips64_machdep.c. I have put this to the test on the mips64 ports builder machines.
