Hi

If you sum two DAC’s without any sort of feedback, you get problems when the
“coarse” dac is changed. You have no way to know the step size of the coarse
dac to (say) 20 bit precision. 

As an example : If you are after 20 “good” bits, you might overlap 
them at the 10 bit point on the coarse dac. That would give you 22 bits on the
summed output. It would give you enough extra bits to take care of any odd 
things that might be going on. You only have 1/1024 of the total range before
you must tune the coarse dac. Even with a good set of parts, you *will* be 
doing coarse tuning.

Bob

> On Nov 26, 2017, at 12:13 PM, Azelio Boriani <azelio.bori...@gmail.com> wrote:
> 
> Is summing a "fine tune" 16bit DAC and a "coarse tune" 16bit (or less)
> DAC with an op-amp not good enough?
> 
> On Sun, Nov 26, 2017 at 5:53 PM, Bob kb8tq <kb...@n1k.org> wrote:
>> Hi
>> 
>> Each time I’ve tried the method in the app note, there has been a tone in 
>> the output
>> spectrum at the sample rate of the ADC. I’ve never found a way to do the 
>> grounding
>> that eliminates it. The tone is large enough to show up as a spur on a 
>> “typical” OCXO
>> when it goes into the EFC port.
>> 
>> Bob
>> 
>>> On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen <opronnin...@gmail.com> 
>>> wrote:
>>> 
>>> I guess everyone has seen this, but Linear has a nice appnote «A Standards 
>>> Lab Grade 20-Bit DAC with 0.1ppm/°C Drift»
>>> 
>>> http://cds.linear.com/docs/en/application-note/an86f.pdf
>>> 
>>> Ole
>>> 
>>>> 26. nov. 2017 kl. 13:50 skrev Magnus Danielson 
>>>> <mag...@rubidium.dyndns.org>:
>>>> 
>>>> Hi
>>>> 
>>>>> On 11/26/2017 02:26 PM, Attila Kinali wrote:
>>>>> Though, if you have a decent 16bit DAC and want to get to 18bit,
>>>>> that's fairly simple using delta-sigma modulation... if you can live
>>>>> with a low pass fillter after the DAC. But the DNL will be the limiting
>>>>> factor here (unless you use some special techniques) and the (absolute) 
>>>>> INL
>>>>> will not get better, for obvious reasons.
>>>> 
>>>> I needed 19 bit rather than 16 bit, so I implemented an interpolation 
>>>> scheme. A first degree sigma-delta would also be possible, but for low 
>>>> ratios what I did was more efficient.
>>>> 
>>>> A first degree sigma-delta is fairly simple thought.
>>>> 
>>>> The trick is that you want to push the noise high up so it becomes trivial 
>>>> to filter, then the filter will not be hard to design and won't be low 
>>>> enough to cause PLL instability and implementation troubles.
>>>> 
>>>> Cheers,
>>>> Magnus
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