On 15:45 Wed 27 Aug , Atsuo Igarashi wrote:
> This patch adds support for KMC KZM-ARM11-01 board.
>
> Signed-off-by Atsuo Igarashi <[EMAIL PROTECTED]>
>
> MAKEALL | 1 +
> Makefile | 3 +
> board/kzm_arm11/Makefile | 49 +++++++
> board/kzm_arm11/config.mk | 1 +
> board/kzm_arm11/kzm_arm11.c | 108 ++++++++++++++
> board/kzm_arm11/lowlevel_init.S | 297
> +++++++++++++++++++++++++++++++++++++++
> board/kzm_arm11/u-boot.lds | 72 ++++++++++
> include/asm-arm/mach-types.h | 13 ++
> include/configs/kzm_arm11.h | 202 ++++++++++++++++++++++++++
> 9 files changed, 746 insertions(+), 0 deletions(-)
> create mode 100644 board/kzm_arm11/Makefile
> create mode 100644 board/kzm_arm11/config.mk
> create mode 100644 board/kzm_arm11/kzm_arm11.c
> create mode 100644 board/kzm_arm11/lowlevel_init.S
> create mode 100644 board/kzm_arm11/u-boot.lds
> create mode 100644 include/configs/kzm_arm11.h
>
> diff --git a/MAKEALL b/MAKEALL
> index e807063..8dab1b6 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -517,6 +517,7 @@ LIST_ARM11=" \
> imx31_litekit \
> imx31_phycore \
> mx31ads \
> + kzm_arm11 \
please keep sorted
> "
>
> #########################################################################
> diff --git a/Makefile b/Makefile
> index 89fea72..26af973 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2746,6 +2746,9 @@ imx31_phycore_config : unconfig
> mx31ads_config : unconfig
> @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
>
> +kzm_arm11_config : unconfig
> + @$(MKCONFIG) $(@:_config=) arm arm1136 kzm_arm11 NULL mx31
ditto
> +
> omap2420h4_config : unconfig
> @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
>
> + __REG(CSCR_A(0)) = 0x00450000;
> +
> + __REG(CSCR_U(1)) = 0x00001801;
> + __REG(CSCR_L(1)) = 0x45450D01;
> + __REG(CSCR_A(1)) = 0x00450000;
> +
> + /* setup pins for UART1 */
> + mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
> + mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
> + mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
> + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
> +
> + /* SPI2 */
> + mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
> + mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
> + mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
> + mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
> + mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
> + mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
> + mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
> +
> + /* start SPI2 clock */
> + __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
> +
> + /* PBC setup */
> + /* Enable UART transceivers also reset the Ethernet/external UART */
> + readw(CS4_BASE + 4);
> +
> + writew(0x8023, CS4_BASE + 4);
> +
> + /* RedBoot also has an empty loop with 100000 iterations here -
> + * clock doesn't run yet */
> + for (i = 0; i < 100000; i++)
> + ;
> +
> + /* Clear the reset, toggle the LEDs */
> + writew(0xDF, CS4_BASE + 6);
> +
> + /* clock still doesn't run */
> + for (i = 0; i < 100000; i++)
> + ;
> +
> + /* See 1.5.4 in IMX31ADSE_PERI_BUS_CNTRL_CPLD_RM.pdf */
> + readb(CS4_BASE + 8);
> + readb(CS4_BASE + 7);
> + readb(CS4_BASE + 8);
> + readb(CS4_BASE + 7);
> +
> + gd->bd->bi_arch_number = MACH_TYPE_KZM_ARM11_01;/* board id for linux */
> + gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
> +
> + return 0;
> +}
> +
> +int checkboard (void)
> +{
> + printf("Board: KZM-ARM11-01\n");
> + return 0;
> +}
> diff --git a/board/kzm_arm11/lowlevel_init.S b/board/kzm_arm11/lowlevel_init.S
> new file mode 100644
> index 0000000..91d5c9b
> --- /dev/null
> +++ b/board/kzm_arm11/lowlevel_init.S
> + ldr r1, [r0, #0x50]
> + and r1, r1, #0x00FFFFFF
> + str r1, [r0, #0x50]
> +.endm /* init_aips */
> +
in this file there is some whitespace please fix it
> +/* RedBoot: MAX (Multi-Layer AHB Crossbar Switch) setup */
> +.macro init_max
> + ldr r0, =0x43F04000
> + /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */
> + ldr r1, =0x00302154
> + str r1, [r0, #0x000] /* for S0 */
> + str r1, [r0, #0x100] /* for S1 */
> + str r1, [r0, #0x200] /* for S2 */
> + str r1, [r0, #0x300] /* for S3 */
> + str r1, [r0, #0x400] /* for S4 */
> + /* SGPCR - always park on last master */
> + ldr r1, =0x10
> + str r1, [r0, #0x010] /* for S0 */
> + str r1, [r0, #0x110] /* for S1 */
> + str r1, [r0, #0x210] /* for S2 */
> + str r1, [r0, #0x310] /* for S3 */
> + str r1, [r0, #0x410] /* for S4 */
> + /* MGPCR - restore default values */
> + ldr r1, =0x0
> + str r1, [r0, #0x800] /* for M0 */
> + str r1, [r0, #0x900] /* for M1 */
> + str r1, [r0, #0xA00] /* for M2 */
> + str r1, [r0, #0xB00] /* for M3 */
> + str r1, [r0, #0xC00] /* for M4 */
> + str r1, [r0, #0xD00] /* for M5 */
> +.endm /* init_max */
> +
> +/* RedBoot: M3IF setup */
> +.macro init_m3if
> + /* Configure M3IF registers */
> + ldr r1, =0xB8003000
> + /*
> + str r1, [r0, #0x54]
> + ldr r1, =0x00340000
> + str r1, [r0, #0x58]
> +.endm /* init_cs5 */
> +
> +.globl lowlevel_init
> +lowlevel_init:
> +
> + /* Redboot initializes very early AIPS, what for?
> + * Then it also initializes Multi-Layer AHB Crossbar Switch,
> + * M3IF */
> + /* Also setup the Peripheral Port Remap register inside the core */
> + ldr r0, =0x40000015 /* start from AIPS 2GB region */
> + mcr p15, 0, r0, c15, c2, 4
> +
> + init_aips
> +
> + init_max
> +
> + init_m3if
> +
> + init_drive_strength
> +
> + init_cs4
> +
> + /* Image Processing Unit: */
> + /* Too early to switch display on? */
> + REG IPU_CONF, IPU_CONF_DI_EN /* Switch on Display Interface
> */
> + /* Clock Control Module: */
> + REG CCM_CCMR, 0x074B0BF5 /* Use CKIH, MCU PLL off */
> +
> + DELAY 0x40000
> +
> + REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE /* MCU PLL on */
> + REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS /* Switch to
> MCU PLL */
> +
> + /* PBC CPLD on CS4 */
> + mov r1, #CS4_BASE
> + ldrh r1, [r1, #0x2]
> + /* Is 27MHz switch set? */
> + ands r1, r1, #0x10
> +
> + /* 532-133-66.5 */
> + ldr r0, =CCM_BASE
> + ldr r1, =0xFF872660
> + /* PDR0 */
> + str r1, [r0, #0x4]
> + ldreq r1, MPCTL_PARAM_532
> + ldrne r1, MPCTL_PARAM_532_27
> + /* MPCTL */
> + str r1, [r0, #0x10]
> +
> + /* Set UPLL=240MHz, USB=60MHz */
> +/* ldr r1, =0x49FCFE7F*/
if no need please remove
> + /* PDR1 */
> +/* str r1, [r0, #0x8]*/
if no need please remove
> + ldreq r1, UPCTL_PARAM_240
> + ldrne r1, UPCTL_PARAM_240_27
> + /* UPCTL */
> + str r1, [r0, #0x14]
> + /* default CLKO to 1/8 of the ARM core */
> + mov r1, #0x000002C0
> + add r1, r1, #0x00000006
> + /* COSR */
> + str r1, [r0, #0x1c]
> +
> + /* RedBoot sets 0x1ff, 7, 3, 5, 1, 3, 0 */
> +/* REG CCM_PDR0, PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) |
> PDR0_HSP_PODF(2) | PDR0_NFC_PODF(6) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(2) |
> PDR0_MCU_PODF(0)*/
if no need please remove
> +
> + /* Redboot: 0, 51, 10, 12 / 0, 14, 9, 13 */
> +/* REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0x33) | PLL_MFI(7) |
> PLL_MFN(0x23)*/
if no need please remove
> + /* Default: 1, 4, 12, 1 */
> + REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
> +
> + /* B8xxxxxx - NAND, 8xxxxxxx - CSD0 RAM */
> + REG 0xB8001010, 0x00000004
> + REG 0xB8001004, 0x0079d72a
> + REG 0xB8001000, 0x92100000
> + REG 0x80000f00, 0x12344321
> + REG 0xB8001000, 0xa2100000
> + REG 0x80000000, 0x12344321
> + REG 0x80000000, 0x12344321
> + REG 0xB8001000, 0xb2100000
> + REG8 0x81000020, 0x00
> + REG8 0x80000033, 0xda
> +/* REG8 0x81000000, 0xff*/
> + REG 0xB8001000, 0x82226080
> + REG 0x80000000, 0xDEADBEEF
> + REG 0xB8001010, 0x0000000c
> +
> + init_cs5
> +
> + mov pc, lr
> +
> +MPCTL_PARAM_532:
> + .word (((1-1) << 26) + ((52-1) << 16) + (10 << 10) + (12 << 0))
> +MPCTL_PARAM_532_27:
> + .word (((1-1) << 26) + ((15-1) << 16) + (9 << 10) + (13 << 0))
> +UPCTL_PARAM_240:
> + .word (((2-1) << 26) + ((13-1) << 16) + (9 << 10) + (3 << 0))
> +UPCTL_PARAM_240_27:
> + .word (((2-1) << 26) + ((9 -1) << 16) + (8 << 10) + (8 << 0))
> diff --git a/board/kzm_arm11/u-boot.lds b/board/kzm_arm11/u-boot.lds
> new file mode 100644
> index 0000000..bb5390e
> --- /dev/null
> +++ b/board/kzm_arm11/u-boot.lds
> @@ -0,0 +1,72 @@
> +/*
> + * Derived from mx31ads
> + *
> + * January 2004 - Changed to support H4 device
> + * Copyright (c) 2004 Texas Instruments
> + *
> + * (C) Copyright 2002
> + * Gary Jennejohn, DENX Software Engineering, <[EMAIL PROTECTED]>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
> +OUTPUT_ARCH(arm)
> +ENTRY(_start)
> +SECTIONS
> +{
please use tab for indentation and fix whitespace
> + . = 0x00000000;
> +
> + . = ALIGN(4);
> + .text :
> + {
> + /* WARNING - the following is hand-optimized to fit within */
> + /* the sector layout of our flash chips! XXX FIXME XXX */
> +
> + cpu/arm1136/start.o (.text)
> + board/kzm_arm11/libkzm_arm11.a (.text)
> + lib_arm/libarm.a (.text)
> + net/libnet.a (.text)
> + drivers/mtd/libmtd.a (.text)
> +
> + . = DEFINED(env_offset) ? env_offset : .;
> + common/environment.o(.text)
> +
> + *(.text)
> + }
> +
> diff --git a/include/configs/kzm_arm11.h b/include/configs/kzm_arm11.h
> new file mode 100644
> index 0000000..8a467bc
> --- /dev/null
> +++ b/include/configs/kzm_arm11.h
> @@ -0,0 +1,202 @@
> +/*
> + * Derived from mx31ads
> + *
> + * Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]>
> + *
> + * Configuration settings for the KMC KZM-ARM11-01 board.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <asm/arch/mx31-regs.h>
> +
> + /* High Level Configuration Options */
> +#define CONFIG_ARM1136 1 /* This is an arm1136
> CPU core */
> +#define CONFIG_MX31 1 /* in a mx31 */
> +#define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */
> +#define CONFIG_MX31_CLK32 32768
> +
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DISPLAY_BOARDINFO
> +
> +/*
> + * Disabled for now due to build problems under Debian and a significant
> increase
> + * in the final file size: 144260 vs. 109536 Bytes.
> + */
> +#if 0
> +#define CONFIG_OF_LIBFDT 1
> +#define CONFIG_FIT 1
> +#define CONFIG_FIT_VERBOSE 1
> +#endif
please remove if no need
> +
> +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
> +#define CONFIG_SETUP_MEMORY_TAGS 1
> +#define CONFIG_INITRD_TAG 1
Best Regards,
J.please remove if no need
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