Hi Jagan, On Thu, Jun 13, 2013 at 1:55 PM, Jagannadha Sutradharudu Teki < jagannadha.sutradharudu-t...@xilinx.com> wrote:
> Bank/Extended addr commands are specific to particular > flash vendor so discover them based on the idocode0. > > Assign the discovered bank commands to spi_flash members > so-that the bank read/write will use their specific operations. > > Signed-off-by: Jagannadha Sutradharudu Teki <jaga...@xilinx.com> > --- > Changes for v4: > - none > Changes for v3: > - none > Changes for v2: > - none > > drivers/mtd/spi/spi_flash.c | 21 +++++++++++++++++++++ > drivers/mtd/spi/spi_flash_internal.h | 14 ++++++++++++++ > include/spi_flash.h | 2 ++ > 3 files changed, 37 insertions(+) > > diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c > index 9ddd070..9c90f00 100644 > --- a/drivers/mtd/spi/spi_flash.c > +++ b/drivers/mtd/spi/spi_flash.c > @@ -304,6 +304,27 @@ int spi_flash_cmd_bankaddr_write(struct spi_flash > *flash, u8 bank_sel) > return 0; > } > > +int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0) > +{ > + /* discover bank cmds */ > + switch (idcode0) { > + case SPI_FLASH_SPANSION_IDCODE0: > + flash->bank_cmd[0] = CMD_BANKADDR_BRRD; > + flash->bank_cmd[1] = CMD_BANKADDR_BRWR; > I suggest bank_read_cmd, bank_write_cmd > + break; > + case SPI_FLASH_STMICRO_IDCODE0: > + case SPI_FLASH_WINBOND_IDCODE0: > + flash->bank_cmd[0] = CMD_EXTNADDR_RDEAR; > + flash->bank_cmd[1] = CMD_EXTNADDR_WREAR; > + break; > + default: > + printf("SF: Unsupported bank commands %02x\n", idcode0); > + return -1; > + } > + > + return 0; > +} > + > #ifdef CONFIG_OF_CONTROL > int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) > { > diff --git a/drivers/mtd/spi/spi_flash_internal.h > b/drivers/mtd/spi/spi_flash_internal.h > index 772fef6..db6c444 100644 > --- a/drivers/mtd/spi/spi_flash_internal.h > +++ b/drivers/mtd/spi/spi_flash_internal.h > @@ -28,6 +28,17 @@ > #define CMD_ERASE_64K 0xd8 > #define CMD_ERASE_CHIP 0xc7 > > +/* Manufacture ID's */ > +#define SPI_FLASH_SPANSION_IDCODE0 0x01 > +#define SPI_FLASH_STMICRO_IDCODE0 0x20 > +#define SPI_FLASH_WINBOND_IDCODE0 0xef > + > +/* Bank addr access commands */ > +#define CMD_BANKADDR_BRWR 0x17 > +#define CMD_BANKADDR_BRRD 0x16 > +#define CMD_EXTNADDR_WREAR 0xC5 > +#define CMD_EXTNADDR_RDEAR 0xC8 > + > /* Common status */ > #define STATUS_WIP 0x01 > > @@ -80,6 +91,9 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, > u8 sr); > /* Program the bank address register */ > int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel); > > +/* Configure the BAR - discover the bank cmds */ > +int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0); > + > /* > * Same as spi_flash_cmd_read() except it also claims/releases the SPI > * bus. Used as common part of the ->read() operation. > diff --git a/include/spi_flash.h b/include/spi_flash.h > index 3b6a44e..50a03bf 100644 > --- a/include/spi_flash.h > +++ b/include/spi_flash.h > @@ -38,6 +38,8 @@ struct spi_flash { > u32 page_size; > /* Erase (sector) size */ > u32 sector_size; > + /* Bank cmds - cmd[0] - read, cmd[1] - write */ > + u8 bank_cmd[2]; > > void *memory_map; /* Address of read-only SPI flash access */ > int (*read)(struct spi_flash *flash, u32 offset, > -- > 1.8.3 > > > Regards, Simon
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