MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
those pins before using UART1.
Signed-off-by: Haiying Wang <haiying.w...@freescale.com>
---
board/freescale/mpc8569mds/mpc8569mds.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mpc8569mds/mpc8569mds.c
b/board/freescale/mpc8569mds/mpc8569mds.c
index 53fef43..cb56106 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -77,6 +77,12 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
{2, 3, 2, 0, 1}, /* ENET2_GRXCLK */
{2, 2, 1, 0, 2}, /* ENET2_GTXCLK */
+ /* UART1 is muxed with QE PortF bit [9-12].*/
+ {5, 12, 2, 0, 3}, /* UART1_SIN */
+ {5, 9, 1, 0, 3}, /* UART1_SOUT */
+ {5, 10, 2, 0, 3}, /* UART1_CTS_B */
+ {5, 11, 1, 0, 2}, /* UART1_RTS_B */
+
{0, 0, 0, 0, QE_IOP_TAB_END} /* END of table */
};
--
1.6.0.2
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