> -----Original Message----- > From: Mark Asselstine [mailto:mark.asselst...@windriver.com] > Sent: Monday, October 19, 2009 6:49 PM > To: u-boot@lists.denx.de; Prafulla Wadaskar > Subject: [PATCH V2] sheevaplug: correct SDRAM address control > register value > > The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in > two banks for a total of 512MB of RAM. Based on this configuration > the existing values for SDRAM address control register are incorrect > and result in random kernel oops as memory is incorrectly accessed > (while for example extracting a large tarball such as a rootfs). > Based on the hardware configuration along with the supporting > documentation from Marvell these are the correct values, as > well this change mimics values previously used in Marvell's own > u-boot git tree for the SheevaPlug. > > Other variants of the hardware such as the PogoPlug and TonidoPlug > may have different memory configurations but to properly support > those additional board directories should be maintained or a better > system to support other kwb*.cfg is needed. > > Tested on SheevaPlug DevKit. > > Signed-off-by: Mark Asselstine <mark.asselst...@windriver.com> > --- > Thanks Simon for the heads up on the documentation change. Changes > from V1, fix comment "reserved" -> "x8". > > board/Marvell/sheevaplug/kwbimage.cfg | 10 +++++----- > 1 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/board/Marvell/sheevaplug/kwbimage.cfg > b/board/Marvell/sheevaplug/kwbimage.cfg > index 6c47d62..3b9c53f 100644 > --- a/board/Marvell/sheevaplug/kwbimage.cfg > +++ b/board/Marvell/sheevaplug/kwbimage.cfg > @@ -74,11 +74,11 @@ DATA 0xFFD0140C 0x00000a33 # DDR > Timing (High) > # bit12-11: TW2W > # bit31-13: zero required > > -DATA 0xFFD01410 0x00000099 # DDR Address Control > -# bit1-0: 01, Cs0width=x16 > -# bit3-2: 10, Cs0size=512Mb > -# bit5-4: 01, Cs1width=x16 > -# bit7-6: 10, Cs1size=512Mb > +DATA 0xFFD01410 0x000000cc # DDR Address Control > +# bit1-0: 00, Cs0width=x8 > +# bit3-2: 11, Cs0size=1Gb > +# bit5-4: 00, Cs1width=x8 > +# bit7-6: 11, Cs1size=1Gb > # bit9-8: 00, Cs2width=nonexistent > # bit11-10: 00, Cs2size =nonexistent > # bit13-12: 00, Cs3width=nonexistent > -- > 1.6.3.3 >
Applied to u-boot-marvell.git next branch Regards.. Prafulla . . > _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot