On 4/23/24 10:51 AM, Philip Oberfichtner wrote:
Bevor this commit, only clause 22 access was possible. After this commit,
clause 45 direct access will available as well.
Note that there is a slight change of behavior: Before this commit, the
C45E bit was set to whatever value was left in the register from the
previous access. After this commit, we adopt the common practice of
discerning C45 from C22 using the devad argument.
Signed-off-by: Philip Oberfichtner <p...@denx.de>
---
Notes:
This patch is labeled RFC as there is a slight change of behavior (see
commit message). I'm not sure in fact if this solution works for
everybody - this is up for discussion!
My implementation is tested on an Intel Elkhart lake SOC. Driver code
for dwc_eth_qos_intel coming soon in a separate patch series.
drivers/net/dwc_eth_qos.c | 66 ++++++++++++++++++++++++++-------------
drivers/net/dwc_eth_qos.h | 1 +
2 files changed, 45 insertions(+), 22 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 86d989e244..64a9bff6bb 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -162,6 +162,25 @@ static int eqos_mdio_wait_idle(struct eqos_priv *eqos)
1000000, true);
}
+/* Bitmask common for mdio_read and mdio_write */
+#define EQOS_MDIO_BITFIELD(pa, rda, cr) \
+ (pa << EQOS_MAC_MDIO_ADDRESS_PA_SHIFT) | \
Parenthesis around (pa) are missing, DTTO for the rest of this.
However, better use FIELD_GET/FIELD_PREP macros instead.
[...]
