Signed-off-by: Christian Riesch <christian.rie...@omicron.at>
Cc: Albert Aribaud <albert.u.b...@aribaud.net>
Cc: Tom Rini <tr...@ti.com>
---
arch/arm/cpu/arm926ejs/start.S | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index b350480..829065f 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -369,7 +369,8 @@ flush_dcache:
mcr p15, 0, r0, c7, c5, 0 /* invalidate I Cache */
/*
- * disable MMU and D cache, and enable I cache
+ * disable MMU and D cache
+ * enable I cache if CONFIG_SYS_ICACHE_OFF is not defined
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00000300 /* clear bits 9:8 (---- --RS) */
@@ -378,7 +379,9 @@ flush_dcache:
#endif
bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
+#ifndef CONFIG_SYS_ICACHE_OFF
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
+#endif
mcr p15, 0, r0, c1, c0, 0
/*
--
1.7.0.4
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