On 08/23/2012 07:10 PM, Tom Rini wrote:
>> +#ifdef CONFIG_ARM
>> /* Define global data structure pointer to it*/
>> gd_t gdata __attribute__ ((section(".data")));
>> +#endif
>
> So you handle cleaning up the BSS differently, interesting. I'm going
> to see if that would work for ARM too..
Yes. Might be that I missed something though. I'll re-check tomorrow.
> [snip]
>> @@ -89,7 +106,11 @@ void spl_parse_image_header(const struct image_header
>> *header)
>> spl_image.size = __be32_to_cpu(header->ih_size) + header_size;
>> spl_image.entry_point = __be32_to_cpu(header->ih_load);
>> /* Load including the header */
>> +#ifdef CONFIG_ARM
>> spl_image.load_addr = spl_image.entry_point - header_size;
>> +#else
>> + spl_image.load_addr = __be32_to_cpu(header->ih_load);
>> +#endif
>
> This isn't an ARM-ism but is instead because spl_nor.c isn't offsetting
> where the header is like mmc/nand/ymodem do, yes? Would it be possible
> to make spl_nor.c behave like the others? One of the reasons I ask is
> I'm looking at a NOR chip on my desk...
I was wondering about this line as well. Please explain: Why can't ARM
just use header->ih_load as load_addr?
Thanks,
Stefan
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