On Tue, 25 Feb 2003, Mark Vojkovich wrote: > > >> While tracking down a bug, I encoutered these functions in: > > >> programs/Xserver/hw/xfree86/vgahw/vgaHW.c:
> > >> void vgaHWLock(vgaHWPtr hwp) > > >> { > > >> /* Protect CRTC[0-7] */ > > >> hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) & ~0x80); > > >> } > > >> void vgaHWUnlock(vgaHWPtr hwp) > > >> { > > >> /* Unprotect CRTC[0-7] */ > > >> hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) | 0x80); > > >> } > > >> Every reference I can find on the sbuject, (specifically Ferraro's book, > > >> 3rd ed, along with many HTML references) indicate that this logic is > > >> reversed. That is, for CRTC reg 0x11 bit 7: 1=disable, 0=enable writing > > >> to CRTC regs[0-7]. > > >> Comments? > > >You are absolutely correct. I've just committed a change to correct this. > > >Thanks for pointing out the problem. > > I wonder why this hasn't shown up as a problem anywhere? > The "nv" driver doesn't use these. It provides its own which > has the reverse logic from what vgaHW was using. Well, the bit doesn't affect reading the registers. As for writes, vgaHWRestoreMode(), which many drivers end up calling to set a mode, ensures the bit is off before re-writting the CRTC registers. Marc. +----------------------------------+-----------------------------------+ | Marc Aurele La France | work: 1-780-492-9310 | | Computing and Network Services | fax: 1-780-492-1729 | | 352 General Services Building | email: [EMAIL PROTECTED] | | University of Alberta +-----------------------------------+ | Edmonton, Alberta | | | T6G 2H1 | Standard disclaimers apply | | CANADA | | +----------------------------------+-----------------------------------+ XFree86 Core Team member. ATI driver and X server internals. _______________________________________________ XFree86 mailing list [EMAIL PROTECTED] http://XFree86.Org/mailman/listinfo/xfree86