> via USB and see how it stands up. But the real question is what > kind of delay, latency, and jitter will there be, getting that raw > I/Q data from the USB interface up to the consuming application?
How is your proposal of zero-copy going to help latency? IIRC we have some real-time thingy, might be able to reduce jitter... But then I might also ask why you're not doing the most critical path on an fpga anyway? Start with identifying your worst bottleneck. > Eliminating as much of the copy in/out WRT the kernel cannot but > help wrong, this design change requires ressources, too, and might gain you higher complexity. measure first.
