I spent some time looking at the feasibility of building an array of 8x8 Hynix (or similar) 32GB NAND flash chips (2TB total) where 8 microcontrollers could control a row of 8 flash chips. The idea is to connect the 8bits bus together down each row, and use the CE (chip enable) line to activate the chip that is intended to be read. These rows could be cross connected with an ad-hoc parallel (and perhaps I2C control channel) bus to a ninth microcontroller that communicates to PC over USB - and manages table lookups asynchronously to maximize USB throughput.
Such a setup should easily be capable of handling over 10k random reads / second. But when I was googling after parts for this project, I came across this beauty: http://www.tomshardware.com/news/RAIDDRive-Storage-Flash,7443.html http://www.supertalent.com/products/ssd_category_detail.php?type=RAIDDrive Access time is listed as 0.1 ms - which is a definite improvement to the proposed Christmas tree of USB memory sticks, but probably slower than the grid solution listed above. It doesn't appear to be on sale yet, neither have I found a price quote. F _______________________________________________ A51 mailing list [email protected] http://lists.lists.reflextor.com/cgi-bin/mailman/listinfo/a51
