From: Tvrtko Ursulin <tvrtko.ursu...@igalia.com>

Now that we keep a cached value it is no longer required to walk the
arrays and check the fuses.

Open however is whether at runtime this query is supposed to report if a
ring has disappeared due for example amdgpu_ib_ring_tests() turning it
off.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@igalia.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 62 +++----------------------
 1 file changed, 6 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index a0ea6fe8d060..b6f411c0801a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -376,114 +376,64 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
        uint32_t ib_start_alignment = 0;
        uint32_t ib_size_alignment = 0;
        enum amd_ip_block_type type;
-       unsigned int num_rings = 0;
-       unsigned int i, j;
+       unsigned int num_rings;
+       unsigned int i;
 
        if (info->query_hw_ip.ip_instance >= AMDGPU_HW_IP_INSTANCE_MAX_COUNT)
                return -EINVAL;
 
+       if (info->query_hw_ip.type >= ARRAY_SIZE(adev->num_ip_rings))
+               return -EINVAL;
+
        switch (info->query_hw_ip.type) {
        case AMDGPU_HW_IP_GFX:
                type = AMD_IP_BLOCK_TYPE_GFX;
-               for (i = 0; i < adev->gfx.num_gfx_rings; i++)
-                       if (adev->gfx.gfx_ring[i].sched.ready)
-                               ++num_rings;
                ib_start_alignment = 32;
                ib_size_alignment = 32;
                break;
        case AMDGPU_HW_IP_COMPUTE:
                type = AMD_IP_BLOCK_TYPE_GFX;
-               for (i = 0; i < adev->gfx.num_compute_rings; i++)
-                       if (adev->gfx.compute_ring[i].sched.ready)
-                               ++num_rings;
                ib_start_alignment = 32;
                ib_size_alignment = 32;
                break;
        case AMDGPU_HW_IP_DMA:
                type = AMD_IP_BLOCK_TYPE_SDMA;
-               for (i = 0; i < adev->sdma.num_instances; i++)
-                       if (adev->sdma.instance[i].ring.sched.ready)
-                               ++num_rings;
                ib_start_alignment = 256;
                ib_size_alignment = 4;
                break;
        case AMDGPU_HW_IP_UVD:
                type = AMD_IP_BLOCK_TYPE_UVD;
-               for (i = 0; i < adev->uvd.num_uvd_inst; i++) {
-                       if (adev->uvd.harvest_config & (1 << i))
-                               continue;
-
-                       if (adev->uvd.inst[i].ring.sched.ready)
-                               ++num_rings;
-               }
                ib_start_alignment = 256;
                ib_size_alignment = 64;
                break;
        case AMDGPU_HW_IP_VCE:
                type = AMD_IP_BLOCK_TYPE_VCE;
-               for (i = 0; i < adev->vce.num_rings; i++)
-                       if (adev->vce.ring[i].sched.ready)
-                               ++num_rings;
                ib_start_alignment = 256;
                ib_size_alignment = 4;
                break;
        case AMDGPU_HW_IP_UVD_ENC:
                type = AMD_IP_BLOCK_TYPE_UVD;
-               for (i = 0; i < adev->uvd.num_uvd_inst; i++) {
-                       if (adev->uvd.harvest_config & (1 << i))
-                               continue;
-
-                       for (j = 0; j < adev->uvd.num_enc_rings; j++)
-                               if (adev->uvd.inst[i].ring_enc[j].sched.ready)
-                                       ++num_rings;
-               }
                ib_start_alignment = 256;
                ib_size_alignment = 4;
                break;
        case AMDGPU_HW_IP_VCN_DEC:
                type = AMD_IP_BLOCK_TYPE_VCN;
-               for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
-                       if (adev->vcn.harvest_config & (1 << i))
-                               continue;
-
-                       if (adev->vcn.inst[i].ring_dec.sched.ready)
-                               ++num_rings;
-               }
                ib_start_alignment = 256;
                ib_size_alignment = 64;
                break;
        case AMDGPU_HW_IP_VCN_ENC:
                type = AMD_IP_BLOCK_TYPE_VCN;
-               for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
-                       if (adev->vcn.harvest_config & (1 << i))
-                               continue;
-
-                       for (j = 0; j < adev->vcn.num_enc_rings; j++)
-                               if (adev->vcn.inst[i].ring_enc[j].sched.ready)
-                                       ++num_rings;
-               }
                ib_start_alignment = 256;
                ib_size_alignment = 4;
                break;
        case AMDGPU_HW_IP_VCN_JPEG:
                type = (amdgpu_device_ip_get_ip_block(adev, 
AMD_IP_BLOCK_TYPE_JPEG)) ?
                        AMD_IP_BLOCK_TYPE_JPEG : AMD_IP_BLOCK_TYPE_VCN;
-
-               for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) {
-                       if (adev->jpeg.harvest_config & (1 << i))
-                               continue;
-
-                       for (j = 0; j < adev->jpeg.num_jpeg_rings; j++)
-                               if (adev->jpeg.inst[i].ring_dec[j].sched.ready)
-                                       ++num_rings;
-               }
                ib_start_alignment = 256;
                ib_size_alignment = 64;
                break;
        case AMDGPU_HW_IP_VPE:
                type = AMD_IP_BLOCK_TYPE_VPE;
-               if (adev->vpe.ring.sched.ready)
-                       ++num_rings;
                ib_start_alignment = 256;
                ib_size_alignment = 4;
                break;
@@ -500,7 +450,7 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
                return 0;
 
        num_rings = min(amdgpu_ctx_num_entities[info->query_hw_ip.type],
-                       num_rings);
+                       adev->num_ip_rings[info->query_hw_ip.type]);
 
        result->hw_ip_version_major = adev->ip_blocks[i].version->major;
        result->hw_ip_version_minor = adev->ip_blocks[i].version->minor;
-- 
2.44.0

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