This is needed to set up the vce clock table in userspace
for proper VCE DPM.

v2: fix copy paste typo in comment
v3: track number of valid states

Reviewed-by: Christian König <christian.koe...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 include/uapi/drm/amdgpu_drm.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index b6a04d4..a03beb1 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -491,6 +491,8 @@ struct drm_amdgpu_cs_chunk_data {
 #define AMDGPU_INFO_NUM_EVICTIONS              0x18
 /* Query memory about VRAM and GTT domains */
 #define AMDGPU_INFO_MEMORY                     0x19
+/* Query vce clock table */
+#define AMDGPU_INFO_VCE_CLOCK_TABLE            0x1A
 
 #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
 #define AMDGPU_INFO_MMR_SE_INDEX_MASK  0xff
@@ -677,6 +679,24 @@ struct drm_amdgpu_info_hw_ip {
        __u32  _pad;
 };
 
+#define AMDGPU_VCE_CLOCK_TABLE_ENTRIES         6
+
+struct drm_amdgpu_info_vce_clock_table_entry {
+       /** System clock */
+       __u32 sclk;
+       /** Memory clock */
+       __u32 mclk;
+       /** VCE clock */
+       __u32 eclk;
+       __u32 pad;
+};
+
+struct drm_amdgpu_info_vce_clock_table {
+       struct drm_amdgpu_info_vce_clock_table_entry 
entries[AMDGPU_VCE_CLOCK_TABLE_ENTRIES];
+       __u32 num_valid_entries;
+       __u32 pad;
+};
+
 /*
  * Supported GPU families
  */
-- 
2.5.5

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