On Wed, Mar 15, 2017 at 5:05 PM, Andres Rodriguez <[email protected]> wrote: > Hey Alex, Christian, > > On a slightly unrelated note. > > Have you also considered using system_highpri_wq instead of system_wq > for the delayed interrupt work? > > There is a potential for multi-ms latency for systems under high CPU > load. And that is usually the case when users are running games.
I vaguely recall some discussion about this last year on the amd-gfx or dri-devel list, but beyond that, not that I know of. Alex > > Regards, > Andres > > > On Wed, Mar 15, 2017 at 4:18 PM, Alex Deucher <[email protected]> wrote: >> From: "Roger.He" <[email protected]> >> >> We originally limited the IH to 4k on tonga since it >> uses bus addresses directly rather than GPU MC addresses, >> so it needs contigous physical memory. This brings it >> inline with other asics. >> >> Signed-off-by: Roger.He <[email protected]> >> Acked-by: Alex Deucher <[email protected]> >> Signed-off-by: Alex Deucher <[email protected]> >> --- >> drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c >> b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c >> index 2053220..3a5097a 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c >> +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c >> @@ -289,7 +289,7 @@ static int tonga_ih_sw_init(void *handle) >> int r; >> struct amdgpu_device *adev = (struct amdgpu_device *)handle; >> >> - r = amdgpu_ih_ring_init(adev, 4 * 1024, true); >> + r = amdgpu_ih_ring_init(adev, 64 * 1024, true); >> if (r) >> return r; >> >> -- >> 2.5.5 >> >> _______________________________________________ >> amd-gfx mailing list >> [email protected] >> https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
