SI does not support PASID or KIQ/MES, so there is no valid TLB fence entity available to perform the TLB flush. Without a fallback return, this will result in a NULL pointer issue due to the invalid TLB flush device entity
Signed-off-by: Prike Liang <[email protected]> Reported-by: Jean Philippe EIMER <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c index cd4acc6adc9e..965ae02232e0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c @@ -772,6 +772,12 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct amdgpu_device *adev, uint16_t pasid, int r, cnt = 0; uint32_t seq; + /* SI does not support PASID or KIQ/MES, and there is no valid + * TLB fence entity available to perform the TLB flush. + */ + if(!adev) + return 0; + /* * A GPU reset should flush all TLBs anyway, so no need to do * this while one is ongoing. -- 2.34.1
