I need to double check, but I think Alex already fixed that. But fixing that can wait till after the holidays.
Regards, Christian. On 12/30/25 02:26, Liang, Prike wrote: > [Public] > > Thank you for the feedback, I will rework the patch a bit and send it for the > test. > > Regards, > Prike > >> -----Original Message----- >> From: Jean Philippe EIMER <[email protected]> >> Sent: Monday, December 29, 2025 5:53 PM >> To: Liang, Prike <[email protected]>; [email protected] >> Cc: Deucher, Alexander <[email protected]>; Koenig, Christian >> <[email protected]> >> Subject: Re: [PATCH] drm/amdgpu: Skip TLB flush for devices predating the SI >> series >> >> Unfortunately this patch doesn't solve the hang I reported. >> >> Please find attached 2 logs obtained with the patch applied, one of them >> being from >> a debug serial console. >> >> >> Le 29/12/2025 à 03:29, Prike Liang a écrit : >>> SI does not support PASID or KIQ/MES, so there is no valid TLB >>> fence entity available to perform the TLB flush. Without a fallback >>> return, this will result in a NULL pointer issue due to the invalid >>> TLB flush device entity >>> >>> Signed-off-by: Prike Liang <[email protected]> >>> Reported-by: Jean Philippe EIMER <[email protected]> >>> --- >>> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 6 ++++++ >>> 1 file changed, 6 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c >>> index cd4acc6adc9e..965ae02232e0 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c >>> @@ -772,6 +772,12 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct >> amdgpu_device *adev, uint16_t pasid, >>> int r, cnt = 0; >>> uint32_t seq; >>> >>> + /* SI does not support PASID or KIQ/MES, and there is no valid >>> + * TLB fence entity available to perform the TLB flush. >>> + */ >>> + if(!adev) >>> + return 0; >>> + >>> /* >>> * A GPU reset should flush all TLBs anyway, so no need to do >>> * this while one is ongoing.
