On 16-Dec-25 10:00 PM, Alex Deucher wrote:
On Wed, Dec 3, 2025 at 8:05 AM Lijo Lazar <[email protected]> wrote:
Add cwsr parameters to userqueue ioctl. User should pass the GPU virtual
address for save/restore buffer, and size allocated. They are supported
only for user compute queues.
Signed-off-by: Lijo Lazar <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 13 +++++++++----
include/uapi/drm/amdgpu_drm.h | 16 ++++++++++++++++
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
index 0ac87618a86a..8865a266d25a 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
@@ -322,16 +322,21 @@ static int mes_userq_mqd_create(struct
amdgpu_usermode_queue *queue,
if (amdgpu_cwsr_is_enabled(adev)) {
cwsr_params.ctx_save_area_address =
- userq_props->ctx_save_area_addr;
- cwsr_params.cwsr_sz = userq_props->ctx_save_area_size;
- cwsr_params.ctl_stack_sz = userq_props->ctl_stack_size;
-
+ compute_mqd->ctx_save_area_addr;
+ cwsr_params.cwsr_sz = compute_mqd->ctx_save_area_size;
+ cwsr_params.ctl_stack_sz = compute_mqd->ctl_stack_size;
r = amdgpu_userq_input_cwsr_params_validate(
queue, &cwsr_params);
if (r) {
kfree(compute_mqd);
goto free_mqd;
}
+ userq_props->ctx_save_area_addr =
+ compute_mqd->ctx_save_area_addr;
+ userq_props->ctx_save_area_size =
+ compute_mqd->ctx_save_area_size;
+ userq_props->ctl_stack_size =
+ compute_mqd->ctl_stack_size;
}
kfree(compute_mqd);
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 2bb9daafb560..1a27e218d4ea 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -464,6 +464,22 @@ struct drm_amdgpu_userq_mqd_compute_gfx11 {
* to get the size.
*/
__u64 eop_va;
+ /**
+ * @ctx_save_area_addr: Virtual address of the GPU memory for
save/restore buffer.
+ * This must be a from a separate GPU object, and use AMDGPU_INFO IOCTL
"be from"
Does it actually need to be a separate buffer?
Actually, I used the same terminology as used in eop va. I think it is
better to keep a dedicated buffer allocated for lifetime control.
Thanks,
Lijo
May also want a
comment that this address covers both the ctx save area and the ctl
stack.
+ * to get the size.
+ */
+ __u64 ctx_save_area_addr;
ctx_save_area_va for consistently.
+ /**
+ * @ctx_save_area_size: Total size allocated for save/restore buffer.
+ * Use AMDGPU_INFO IOCTL to get the size.
+ */
+ __u32 ctx_save_area_size;
+ /**
+ * @ctl_stack_size: Size of control stack region in the save/restore
buffer.
+ * Use AMDGPU_INFO IOCTL to get the size.
+ */
Specify that these are in bytes.
Alex
+ __u32 ctl_stack_size;
};
/* userq signal/wait ioctl */
--
2.49.0
