On Thu, Apr 30, 2026 at 12:29 PM Jesse Zhang <[email protected]> wrote: > > From: "Jesse.zhang" <[email protected]> > > Kernel-side abstraction work for the SDMA usermode-queue plumbing > landed in subsequent per-engine patches: > > - mes_add_queue_input gains is_user_mode_submission and > unmap_flag_addr. Without is_user_mode_submission MES treats SDMA > queues as kernel-managed and uses the end-of-MQD slot for the unmap > flag, so PROTECTED_FENCE at the tail of every SDMA IB looks like a > "queue done" signal and MES gangs the queue out forever. > > - mes_misc_opcode gains MES_MISC_OP_NOTIFY_WORK_ON_UNMAPPED_QUEUE > with a notify_work.priority_level payload. This wakes a gangs-out > SDMA UMQ so subsequent IBs get re-mapped (SDMA has no > CP_UNMAPPED_DOORBELL HW intercept). > > Also surface the matching firmware bits in mes_v12_api_def.h: > is_user_mode_submission / enable_perf_profiling / > exclude_process_limit / is_video_blit_queue bitfields in > MESAPI__ADD_QUEUE, and the unmap_flag_addr packet field. > > Signed-off-by: Jesse Zhang <[email protected]>
Acked-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 7 +++++++ > drivers/gpu/drm/amd/include/mes_v12_api_def.h | 12 +++++++++++- > 2 files changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h > index cafc5caae822..705056de94b0 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h > @@ -265,6 +265,8 @@ struct mes_add_queue_input { > uint32_t exclusively_scheduled; > uint32_t sh_mem_config_data; > uint32_t vm_cntx_cntl; > + uint32_t is_user_mode_submission; > + uint64_t unmap_flag_addr; > }; > > struct mes_remove_queue_input { > @@ -343,6 +345,7 @@ enum mes_misc_opcode { > MES_MISC_OP_WRM_REG_WR_WAIT, > MES_MISC_OP_SET_SHADER_DEBUGGER, > MES_MISC_OP_CHANGE_CONFIG, > + MES_MISC_OP_NOTIFY_WORK_ON_UNMAPPED_QUEUE, > }; > > struct mes_misc_op_input { > @@ -397,6 +400,10 @@ struct mes_misc_op_input { > uint32_t tdr_delay; > } tdr_config; > } change_config; > + > + struct { > + uint32_t priority_level; > + } notify_work; > }; > }; > > diff --git a/drivers/gpu/drm/amd/include/mes_v12_api_def.h > b/drivers/gpu/drm/amd/include/mes_v12_api_def.h > index e541a43714a1..cd6e60184a06 100644 > --- a/drivers/gpu/drm/amd/include/mes_v12_api_def.h > +++ b/drivers/gpu/drm/amd/include/mes_v12_api_def.h > @@ -381,7 +381,11 @@ union MESAPI__ADD_QUEUE { > uint32_t exclusively_scheduled : 1; > uint32_t is_long_running : 1; > uint32_t is_dwm_queue : 1; > - uint32_t reserved : 15; > + uint32_t is_video_blit_queue : 1; > + uint32_t is_user_mode_submission : 1; > + uint32_t enable_perf_profiling : 1; > + uint32_t exclude_process_limit : 1; > + uint32_t reserved : 11; > }; > struct MES_API_STATUS api_status; > uint64_t tma_addr; > @@ -393,6 +397,12 @@ union MESAPI__ADD_QUEUE { > uint32_t queue_id; > uint32_t alignment_mode_setting; > uint32_t full_sh_mem_config_data; > + /* > + * MC addr where MES writes 1 when it unmaps the queue. Used > + * by user-mode SDMA UMQs so the kernel/userspace can detect > + * the unmapped state and re-arm work via > NOTIFY_WORK_ON_UNMAPPED_QUEUE. > + */ > + uint64_t unmap_flag_addr; > }; > > uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; > -- > 2.49.0 >
