[PATCH 2/2] drm/amdgpu: drm/amdgpu: Set correct DMA mask for gfx12.1

[Harish Kasiviswanathan]

Set correct DMA mask for gfx12.1

Signed-off-by: Harish Kasiviswanathan <harish.kasiviswanat...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index a921e4c007ca..59603149fc27 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
@@ -811,7 +811,7 @@ static int gmc_v12_0_gart_init(struct amdgpu_device *adev)
 
 static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
 {
-       int r, vram_width = 0, vram_type = 0, vram_vendor = 0;
+       int r, vram_width = 0, vram_type = 0, vram_vendor = 0, dma_addr_bits;
        struct amdgpu_device *adev = ip_block->adev;
        uint64_t pa_mask = 0;
        int i;
@@ -844,6 +844,7 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block 
*ip_block)
                 */
                amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);
                pa_mask = 0x0000FFFFFFFFF000ULL; /* 48 bit PA */
+               dma_addr_bits = 44;
                break;
        case IP_VERSION(12, 1, 0):
                bitmap_set(adev->vmhubs_mask, AMDGPU_GFXHUB(0),
@@ -857,6 +858,7 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block 
*ip_block)
                 */
                amdgpu_vm_adjust_size(adev, 128 * 1024 * 1024, 9, 4, 57);
                pa_mask = 0x000FFFFFFFFFF000ULL; /* 52 bit PA */
+               dma_addr_bits = 52;
                break;
        default:
                break;
@@ -915,13 +917,13 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block 
*ip_block)
        adev->gmc.mc_mask = AMDGPU_GMC_HOLE_MASK;
        adev->gmc.pa_mask = pa_mask;
 
-       r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
+       r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(dma_addr_bits));
        if (r) {
                drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
                return r;
        }
 
-       adev->need_swiotlb = drm_need_swiotlb(44);
+       adev->need_swiotlb = drm_need_swiotlb(dma_addr_bits);
 
        r = gmc_v12_0_mc_init(adev);
        if (r)
-- 
2.43.0