From: James Lin <[email protected]> [Why & How] This reverts commit 7d9d8fc1db837bdf39a8947b2928ec562dab83f1.
1. Auto-generated Header: The file 'dmub_cmd.h' is an auto-generated header managed in an external repository (dmu_stg). Manual changes made directly in this repository will be overwritten and lost during the next automated weekly synchronization. 2. Tooling Compatibility: This header is governed by internal AMD firmware standards which require Doxygen formatting for cross-team documentation. Moving to kernel-doc syntax may break internal documentation pipelines. 3. Suppressing Warnings: Current 'make htmldocs' and 'make W=1' builds do not actively scan 'dmub_cmd.h' for kernel-doc compliance, thus no warnings are triggered during standard compilation. To address warnings generated when manually running './scripts/kernel-doc', we have added a notice at the file header indicating that this is an auto-generated file that does not strictly follow kernel-doc formatting. This ensures that any future linting tools or manual checks recognize the formatting as intentional. Acked-by: Harry Wentland <[email protected]> Acked-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: James Lin <[email protected]> --- .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 156 ++++++------------ 1 file changed, 48 insertions(+), 108 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index c1becd664cb9..2f68438000ea 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -1008,30 +1008,15 @@ union dmub_fw_boot_status { * enum dmub_fw_boot_status_bit - Enum bit definitions for SCRATCH0. */ enum dmub_fw_boot_status_bit { - /** @DMUB_FW_BOOT_STATUS_BIT_DAL_FIRMWARE: 1 if DAL FW */ - DMUB_FW_BOOT_STATUS_BIT_DAL_FIRMWARE = (1 << 0), - /** @DMUB_FW_BOOT_STATUS_BIT_MAILBOX_READY: 1 if mailbox ready */ - DMUB_FW_BOOT_STATUS_BIT_MAILBOX_READY = (1 << 1), - /** @DMUB_FW_BOOT_STATUS_BIT_OPTIMIZED_INIT_DONE: 1 if init done */ - DMUB_FW_BOOT_STATUS_BIT_OPTIMIZED_INIT_DONE = (1 << 2), - /** @DMUB_FW_BOOT_STATUS_BIT_RESTORE_REQUIRED: 1 if driver should call restore */ - DMUB_FW_BOOT_STATUS_BIT_RESTORE_REQUIRED = (1 << 3), - /** - * @DMUB_FW_BOOT_STATUS_BIT_DEFERRED_LOADED: 1 if VBIOS data is - * deferred programmed - */ - DMUB_FW_BOOT_STATUS_BIT_DEFERRED_LOADED = (1 << 4), - /** @DMUB_FW_BOOT_STATUS_BIT_FAMS_ENABLED: 1 if FAMS is enabled */ - DMUB_FW_BOOT_STATUS_BIT_FAMS_ENABLED = (1 << 5), - /** - * @DMUB_FW_BOOT_STATUS_BIT_DETECTION_REQUIRED: 1 if detection needs - * to be triggered by driver - */ - DMUB_FW_BOOT_STATUS_BIT_DETECTION_REQUIRED = (1 << 6), - /** @DMUB_FW_BOOT_STATUS_BIT_HW_POWER_INIT_DONE: 1 if hw power init is completed */ - DMUB_FW_BOOT_STATUS_BIT_HW_POWER_INIT_DONE = (1 << 7), - /** @DMUB_FW_BOOT_STATUS_BIT_ONO_REGIONS_ENABLED: if ONO regions are enabled */ - DMUB_FW_BOOT_STATUS_BIT_ONO_REGIONS_ENABLED = (1 << 8), + DMUB_FW_BOOT_STATUS_BIT_DAL_FIRMWARE = (1 << 0), /**< 1 if DAL FW */ + DMUB_FW_BOOT_STATUS_BIT_MAILBOX_READY = (1 << 1), /**< 1 if mailbox ready */ + DMUB_FW_BOOT_STATUS_BIT_OPTIMIZED_INIT_DONE = (1 << 2), /**< 1 if init done */ + DMUB_FW_BOOT_STATUS_BIT_RESTORE_REQUIRED = (1 << 3), /**< 1 if driver should call restore */ + DMUB_FW_BOOT_STATUS_BIT_DEFERRED_LOADED = (1 << 4), /**< 1 if VBIOS data is deferred programmed */ + DMUB_FW_BOOT_STATUS_BIT_FAMS_ENABLED = (1 << 5), /**< 1 if FAMS is enabled*/ + DMUB_FW_BOOT_STATUS_BIT_DETECTION_REQUIRED = (1 << 6), /**< 1 if detection need to be triggered by driver*/ + DMUB_FW_BOOT_STATUS_BIT_HW_POWER_INIT_DONE = (1 << 7), /**< 1 if hw power init is completed */ + DMUB_FW_BOOT_STATUS_BIT_ONO_REGIONS_ENABLED = (1 << 8), /**< 1 if ONO regions are enabled */ }; /* Register bit definition for SCRATCH5 */ @@ -1095,22 +1080,18 @@ enum dmub_ips_comand_type { */ enum dmub_cursor_offload_comand_type { /** - * @DMUB_CMD__CURSOR_OFFLOAD_INIT: * Initializes the cursor offload feature. */ DMUB_CMD__CURSOR_OFFLOAD_INIT = 0, /** - * @DMUB_CMD__CURSOR_OFFLOAD_STREAM_ENABLE: Enables cursor offloading - * for a stream and updates the timing parameters. + * Enables cursor offloading for a stream and updates the timing parameters. */ DMUB_CMD__CURSOR_OFFLOAD_STREAM_ENABLE = 1, /** - * @DMUB_CMD__CURSOR_OFFLOAD_STREAM_DISABLE: * Disables cursor offloading for a given stream. */ DMUB_CMD__CURSOR_OFFLOAD_STREAM_DISABLE = 2, /** - * @DMUB_CMD__CURSOR_OFFLOAD_STREAM_PROGRAM: * Programs the latest data for a given stream. */ DMUB_CMD__CURSOR_OFFLOAD_STREAM_PROGRAM = 3, @@ -1176,7 +1157,7 @@ enum dmub_fw_boot_options_bit { * [Header (256 Bytes)][Feature 1 (256 Bytes)][Feature 2 (256 Bytes)]... */ -/* +/** * enum dmub_shared_state_feature_id - List of shared state features. */ enum dmub_shared_state_feature_id { @@ -1933,36 +1914,30 @@ enum dmub_cmd_type { */ enum dmub_out_cmd_type { /** - * @DMUB_OUT_CMD__NULL: Invalid outbox command, ignored. + * Invalid outbox command, ignored. */ DMUB_OUT_CMD__NULL = 0, /** - * @DMUB_OUT_CMD__DP_AUX_REPLY: * Command type used for DP AUX Reply data notification */ DMUB_OUT_CMD__DP_AUX_REPLY = 1, /** - * @DMUB_OUT_CMD__DP_HPD_NOTIFY: * Command type used for DP HPD event notification */ DMUB_OUT_CMD__DP_HPD_NOTIFY = 2, /** - * @DMUB_OUT_CMD__SET_CONFIG_REPLY: * Command type used for SET_CONFIG Reply notification */ DMUB_OUT_CMD__SET_CONFIG_REPLY = 3, /** - * @DMUB_OUT_CMD__DPIA_NOTIFICATION: * Command type used for USB4 DPIA notification */ DMUB_OUT_CMD__DPIA_NOTIFICATION = 5, /** - * @DMUB_OUT_CMD__HPD_SENSE_NOTIFY: * Command type used for HPD redetect notification */ DMUB_OUT_CMD__HPD_SENSE_NOTIFY = 6, /** - * @DMUB_OUT_CMD__FUSED_IO: * Command type used for Fused IO notification */ DMUB_OUT_CMD__FUSED_IO = 7, @@ -2154,19 +2129,19 @@ struct dmub_rb_cmd_PLAT_54186_wa { */ enum dmub_cmd_mall_type { /** - * @DMUB_CMD__MALL_ACTION_ALLOW: Allows display refresh from MALL. + * Allows display refresh from MALL. */ DMUB_CMD__MALL_ACTION_ALLOW = 0, /** - * @DMUB_CMD__MALL_ACTION_DISALLOW: Disallows display refresh from MALL. + * Disallows display refresh from MALL. */ DMUB_CMD__MALL_ACTION_DISALLOW = 1, /** - * @DMUB_CMD__MALL_ACTION_COPY_CURSOR: Cursor copy for MALL. + * Cursor copy for MALL. */ DMUB_CMD__MALL_ACTION_COPY_CURSOR = 2, /** - * @DMUB_CMD__MALL_ACTION_NO_DF_REQ: Controls DF requests. + * Controls DF requests. */ DMUB_CMD__MALL_ACTION_NO_DF_REQ = 3, }; @@ -2195,21 +2170,18 @@ struct dmub_rb_cmd_mall { */ enum dmub_cmd_cab_type { /** - * @DMUB_CMD__CAB_NO_IDLE_OPTIMIZATION: * No idle optimizations (i.e. no CAB) */ DMUB_CMD__CAB_NO_IDLE_OPTIMIZATION = 0, /** - * @DMUB_CMD__CAB_NO_DCN_REQ: No DCN requests for memory + * No DCN requests for memory */ DMUB_CMD__CAB_NO_DCN_REQ = 1, /** - * @DMUB_CMD__CAB_DCN_SS_FIT_IN_CAB: * Fit surfaces in CAB (i.e. CAB enable) */ DMUB_CMD__CAB_DCN_SS_FIT_IN_CAB = 2, /** - * @DMUB_CMD__CAB_DCN_SS_NOT_FIT_IN_CAB: * Do not fit surfaces in CAB (i.e. no CAB) */ DMUB_CMD__CAB_DCN_SS_NOT_FIT_IN_CAB = 3, @@ -2224,7 +2196,7 @@ struct dmub_rb_cmd_cab_for_ss { uint8_t debug_bits; /* debug bits */ }; -/* +/** * Enum for indicating which MCLK switch mode per pipe */ enum mclk_switch_mode { @@ -2702,18 +2674,11 @@ struct dmub_fams2_stream_static_state_v1 { * p-state request to allow latency */ enum dmub_fams2_allow_delay_check_mode { - /** - * @FAMS2_ALLOW_DELAY_CHECK_NONE: No check for request to allow delay - */ + /* No check for request to allow delay */ FAMS2_ALLOW_DELAY_CHECK_NONE = 0, - /** - * @FAMS2_ALLOW_DELAY_CHECK_FROM_START: Check for request to allow delay - */ + /* Check for request to allow delay */ FAMS2_ALLOW_DELAY_CHECK_FROM_START = 1, - /** - * @FAMS2_ALLOW_DELAY_CHECK_FROM_PREPARE: - * Check for prepare to allow delay - */ + /* Check for prepare to allow delay */ FAMS2_ALLOW_DELAY_CHECK_FROM_PREPARE = 2, }; @@ -2785,28 +2750,27 @@ struct dmub_rb_cmd_ib { */ enum dmub_cmd_idle_opt_type { /** - * @DMUB_CMD__IDLE_OPT_DCN_RESTORE: DCN hardware restore. + * DCN hardware restore. */ DMUB_CMD__IDLE_OPT_DCN_RESTORE = 0, /** - * @DMUB_CMD__IDLE_OPT_DCN_SAVE_INIT: DCN hardware save. + * DCN hardware save. */ DMUB_CMD__IDLE_OPT_DCN_SAVE_INIT = 1, /** - * @DMUB_CMD__IDLE_OPT_DCN_NOTIFY_IDLE: DCN hardware notify idle. + * DCN hardware notify idle. */ DMUB_CMD__IDLE_OPT_DCN_NOTIFY_IDLE = 2, /** - * @DMUB_CMD__IDLE_OPT_SET_DC_POWER_STATE: * DCN hardware notify power state. */ DMUB_CMD__IDLE_OPT_SET_DC_POWER_STATE = 3, /** - * @DMUB_CMD__IDLE_OPT_RELEASE_HW: DCN notify to release HW. + * DCN notify to release HW. */ DMUB_CMD__IDLE_OPT_RELEASE_HW = 4, }; @@ -2835,7 +2799,7 @@ struct dmub_rb_cmd_idle_opt_dcn_notify_idle { struct dmub_dcn_notify_idle_cntl_data cntl_data; }; -/* +/** * enum dmub_idle_opt_dc_power_state - DC power states. */ enum dmub_idle_opt_dc_power_state { @@ -2877,7 +2841,7 @@ struct dmub_clocks { */ enum dmub_cmd_clk_mgr_type { /** - * @DMUB_CMD__CLK_MGR_NOTIFY_CLOCKS: Notify DMCUB of clock update. + * Notify DMCUB of clock update. */ DMUB_CMD__CLK_MGR_NOTIFY_CLOCKS = 0, }; @@ -3122,40 +3086,21 @@ struct dmub_rb_cmd_dpphy_init { * 4 AUX request command bits are shifted to high nibble. */ enum dp_aux_request_action { - /** - * @DP_AUX_REQ_ACTION_I2C_WRITE: I2C-over-AUX write request - */ + /** I2C-over-AUX write request */ DP_AUX_REQ_ACTION_I2C_WRITE = 0x00, - /** - * @DP_AUX_REQ_ACTION_I2C_READ: I2C-over-AUX read request - */ + /** I2C-over-AUX read request */ DP_AUX_REQ_ACTION_I2C_READ = 0x10, - /** - * @DP_AUX_REQ_ACTION_I2C_STATUS_REQ: I2C-over-AUX write status request - */ + /** I2C-over-AUX write status request */ DP_AUX_REQ_ACTION_I2C_STATUS_REQ = 0x20, - /** - * @DP_AUX_REQ_ACTION_I2C_WRITE_MOT: - * I2C-over-AUX write request with MOT=1 - */ + /** I2C-over-AUX write request with MOT=1 */ DP_AUX_REQ_ACTION_I2C_WRITE_MOT = 0x40, - /** - * @DP_AUX_REQ_ACTION_I2C_READ_MOT: - * I2C-over-AUX read request with MOT=1 - */ + /** I2C-over-AUX read request with MOT=1 */ DP_AUX_REQ_ACTION_I2C_READ_MOT = 0x50, - /** - * @DP_AUX_REQ_ACTION_I2C_STATUS_REQ_MOT: - * I2C-over-AUX write status request with MOT=1 - */ + /** I2C-over-AUX write status request with MOT=1 */ DP_AUX_REQ_ACTION_I2C_STATUS_REQ_MOT = 0x60, - /** - * @DP_AUX_REQ_ACTION_DPCD_WRITE: Native AUX write request - */ + /** Native AUX write request */ DP_AUX_REQ_ACTION_DPCD_WRITE = 0x80, - /** - * @DP_AUX_REQ_ACTION_DPCD_READ: Native AUX read request - */ + /** Native AUX read request */ DP_AUX_REQ_ACTION_DPCD_READ = 0x90 }; @@ -3163,21 +3108,21 @@ enum dp_aux_request_action { * enum aux_return_code_type - DP AUX process return code listing. */ enum aux_return_code_type { - /** @AUX_RET_SUCCESS: AUX process succeeded */ + /** AUX process succeeded */ AUX_RET_SUCCESS = 0, - /** @AUX_RET_ERROR_UNKNOWN: AUX process failed with unknown reason */ + /** AUX process failed with unknown reason */ AUX_RET_ERROR_UNKNOWN, - /** @AUX_RET_ERROR_INVALID_REPLY: AUX process completed with invalid reply */ + /** AUX process completed with invalid reply */ AUX_RET_ERROR_INVALID_REPLY, - /** @AUX_RET_ERROR_TIMEOUT: AUX process timed out */ + /** AUX process timed out */ AUX_RET_ERROR_TIMEOUT, - /** @AUX_RET_ERROR_HPD_DISCON: HPD was low during AUX process */ + /** HPD was low during AUX process */ AUX_RET_ERROR_HPD_DISCON, - /** @AUX_RET_ERROR_ENGINE_ACQUIRE: Failed to acquire AUX engine */ + /** Failed to acquire AUX engine */ AUX_RET_ERROR_ENGINE_ACQUIRE, - /** @AUX_RET_ERROR_INVALID_OPERATION: AUX request not supported */ + /** AUX request not supported */ AUX_RET_ERROR_INVALID_OPERATION, - /** @AUX_RET_ERROR_PROTOCOL_ERROR: AUX process not available */ + /** AUX process not available */ AUX_RET_ERROR_PROTOCOL_ERROR, }; @@ -3185,9 +3130,9 @@ enum aux_return_code_type { * enum aux_channel_type - DP AUX channel type listing. */ enum aux_channel_type { - /** @AUX_CHANNEL_LEGACY_DDC: AUX thru Legacy DP AUX */ + /** AUX thru Legacy DP AUX */ AUX_CHANNEL_LEGACY_DDC, - /** @AUX_CHANNEL_DPIA: AUX thru DPIA DP tunneling */ + /** AUX thru DPIA DP tunneling */ AUX_CHANNEL_DPIA }; @@ -3672,7 +3617,7 @@ enum phy_link_rate { */ }; -/* +/** * enum dmub_phy_fsm_state - PHY FSM states. * PHY FSM state to transit to during PSR enable/disable. */ @@ -5949,11 +5894,10 @@ struct dmub_rb_cmd_abm_query_caps { */ enum dmub_abm_ace_curve_type { /** - * @ABM_ACE_CURVE_TYPE__SW: ACE curve as defined by the SW layer. + * ACE curve as defined by the SW layer. */ ABM_ACE_CURVE_TYPE__SW = 0, /** - * @ABM_ACE_CURVE_TYPE__SW_IF: * ACE curve as defined by the SW to HW translation interface layer. */ ABM_ACE_CURVE_TYPE__SW_IF = 1, @@ -5964,11 +5908,10 @@ enum dmub_abm_ace_curve_type { */ enum dmub_abm_histogram_type { /** - * @ABM_HISTOGRAM_TYPE__SW: ACE curve as defined by the SW layer. + * ACE curve as defined by the SW layer. */ ABM_HISTOGRAM_TYPE__SW = 0, /** - * @ABM_HISTOGRAM_TYPE__SW_IF: * ACE curve as defined by the SW to HW translation interface layer. */ ABM_HISTOGRAM_TYPE__SW_IF = 1, @@ -6174,17 +6117,14 @@ struct dmub_rb_cmd_get_visual_confirm_color { */ enum dmub_cmd_panel_cntl_type { /** - * @DMUB_CMD__PANEL_CNTL_HW_INIT: * Initializes embedded panel hardware blocks. */ DMUB_CMD__PANEL_CNTL_HW_INIT = 0, /** - * @DMUB_CMD__PANEL_CNTL_QUERY_BACKLIGHT_INFO: * Queries backlight info for the embedded panel. */ DMUB_CMD__PANEL_CNTL_QUERY_BACKLIGHT_INFO = 1, /** - * @DMUB_CMD__PANEL_DEBUG_PWM_FREQ: * Sets the PWM Freq as per user's requirement. */ DMUB_CMD__PANEL_DEBUG_PWM_FREQ = 2, -- 2.43.0
