AMD General
Patch 19-23 are Reviewed-by: Prike Liang <[email protected]>
Reset the user queue per queue directly rather than walk over all the queues
type each time, which is also my plan to improve the reset latency and
simplicity and the idea was pointed out at the Christian's fix about rework the
userq reset work scheduled patch upstream period.
Regards,
Prike
> -----Original Message-----
> From: amd-gfx <[email protected]> On Behalf Of Jesse
> Zhang
> Sent: Monday, June 1, 2026 1:49 PM
> To: [email protected]
> Cc: Deucher, Alexander <[email protected]>; Koenig, Christian
> <[email protected]>; Deucher, Alexander
> <[email protected]>; Zhang, Jesse(Jie) <[email protected]>
> Subject: [PATCH v2 23/42] drm/amdgpu/userq: drop detect_and_reset callback
>
> From: Alex Deucher <[email protected]>
>
> No longer needed.
>
> Signed-off-by: Alex Deucher <[email protected]>
> Reviewed-by: Jesse Zhang <[email protected]>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h | 2 -
> drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 53 ----------------------
> 2 files changed, 55 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h
> index 2403a5d990f2..631315f89bb1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h
> @@ -106,8 +106,6 @@ struct amdgpu_userq_funcs {
> int (*map)(struct amdgpu_usermode_queue *queue);
> int (*preempt)(struct amdgpu_usermode_queue *queue);
> int (*restore)(struct amdgpu_usermode_queue *queue);
> - int (*detect_and_reset)(struct amdgpu_device *adev,
> - int queue_type);
> int (*reset)(struct amdgpu_usermode_queue *queue); };
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> index 4f285a8218dd..cf7e2ab66d10 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> @@ -219,58 +219,6 @@ static int mes_userq_create_ctx_space(struct
> amdgpu_userq_mgr *uq_mgr,
> return 0;
> }
>
> -static int mes_userq_detect_and_reset(struct amdgpu_device *adev,
> - int queue_type)
> -{
> - int db_array_size = amdgpu_mes_get_hung_queue_db_array_size(adev);
> - struct mes_detect_and_reset_queue_input input;
> - struct amdgpu_usermode_queue *queue;
> - unsigned int hung_db_num = 0;
> - unsigned long queue_id;
> - u32 db_array[8];
> - bool found_hung_queue = false;
> - int r, i;
> -
> - if (db_array_size > 8) {
> - dev_err(adev->dev, "DB array size (%d vs 8) too small\n",
> - db_array_size);
> - return -EINVAL;
> - }
> -
> - memset(&input, 0x0, sizeof(struct mes_detect_and_reset_queue_input));
> -
> - input.queue_type = queue_type;
> -
> - amdgpu_mes_lock(&adev->mes);
> - r = amdgpu_mes_detect_and_reset_hung_queues(adev, queue_type, false,
> - &hung_db_num, db_array, 0);
> - amdgpu_mes_unlock(&adev->mes);
> - if (r) {
> - dev_err(adev->dev, "Failed to detect and reset queues, err
> (%d)\n", r);
> - } else if (hung_db_num) {
> - xa_for_each(&adev->userq_doorbell_xa, queue_id, queue) {
> - if (queue->queue_type == queue_type) {
> - for (i = 0; i < hung_db_num; i++) {
> - if (queue->doorbell_index ==
> db_array[i]) {
> - queue->state =
> AMDGPU_USERQ_STATE_HUNG;
> - found_hung_queue = true;
> - atomic_inc(&adev-
> >gpu_reset_counter);
> -
> amdgpu_userq_fence_driver_force_completion(queue);
> -
> drm_dev_wedged_event(adev_to_drm(adev),
> DRM_WEDGE_RECOVERY_NONE, NULL);
> - }
> - }
> - }
> - }
> - }
> -
> - if (found_hung_queue) {
> - /* Resume scheduling after hang recovery */
> - r = amdgpu_mes_resume(adev, input.xcc_id);
> - }
> -
> - return r;
> -}
> -
> static int mes_userq_mqd_create(struct amdgpu_usermode_queue *queue,
> struct drm_amdgpu_userq_in *args_in) { @@
> -545,7
> +493,6 @@ const struct amdgpu_userq_funcs userq_mes_funcs = {
> .mqd_destroy = mes_userq_mqd_destroy,
> .unmap = mes_userq_unmap,
> .map = mes_userq_map,
> - .detect_and_reset = mes_userq_detect_and_reset,
> .preempt = mes_userq_preempt,
> .restore = mes_userq_restore,
> .reset = mes_userq_reset,
> --
> 2.49.0
