From: Wayne Lin <[email protected]> Iterate every CRC engine instance when enabling or disabling the pipe CRC source so DCN31x OTG_CRC1_EN is handled alongside OTG_CRC_EN, matching the legacy shared enable behavior used by DisplayCRC multi-ROI.
Reviewed-by: ChiaHsuan (Tom) Chung <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Signed-off-by: Roman Li <[email protected]> --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 13 +++++++++---- drivers/gpu/drm/amd/display/dc/dc_types.h | 3 ++- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c index 05387bedf24a..db546dd44b91 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c @@ -604,10 +604,15 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc, /* Enable or disable CRTC CRC generation */ if (dm_is_crc_source_crtc(source) || source == AMDGPU_DM_PIPE_CRC_SOURCE_NONE) { - if (!dc_stream_configure_crc(stream_state->ctx->dc, - stream_state, NULL, enable, enable, 0, true, crc_poly_mode)) { - ret = -EINVAL; - goto unlock; + int i; + + for (i = 0; i < MAX_CRC_WINDOW_NUM; i++) { + if (!dc_stream_configure_crc(stream_state->ctx->dc, + stream_state, NULL, enable, enable, + i, true, crc_poly_mode)) { + ret = -EINVAL; + goto unlock; + } } } diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index b14d882e08d4..7da673111ed9 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -1045,9 +1045,10 @@ enum backlight_control_type { BACKLIGHT_CONTROL_AMD_AUX = 2, }; -#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) #define MAX_CRC_WINDOW_NUM 2 +#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) + struct otg_phy_mux { uint8_t phy_output_num; uint8_t otg_output_num; -- 2.34.1
