Maybe this is a tangent, but I'm curious about this topology. Is this running as a virtualized guest? At the hardware level, a PCIe endpoint must have a Root Port somewhere, even if it isn't visible to the OS (as is often the case in virtualized guests). Defer to Jon on what the actual hardware configuration is, but this is physical hardware, no virtualisation, running as the UEFI rather than U-Boot (devicetree) variant. See: https://dev.solid-run.com/nxp/lx2160a/com-som/lx2160a-com-hardware-user-manual#block-diagram
The main quirk with the hardware topology is that the root port's address space is outside of the ECAM address space used for the devices below it. For Arm SystemReady compliance, and to allow distros to boot out of the box the only option was to only expose the devices on the bus and configure the root port in the firmware. This was not our first choice but at the time quirks for the PCIe ACPI setup were no longer being accepted in mainline. I would be happy to resurrect the ACPI quirk patch needed so the bus would look more normal if that would be accepted now. -Jon Liz --- 🐝🍯🐝 Liz Fong-Jones, MACS (Snr) CP, Technical Fellow 🍯🐝🍯 honeycomb.io<http://honeycomb.io/> - The observability platform for teams who manage software that matters. lizthegrey.com<http://lizthegrey.com/> // linkedin.com/in/efong<http://linkedin.com/in/efong> // bsky.app/profile/lizthegrey.com<http://bsky.app/profile/lizthegrey.com>
