From: YiPeng Chai <[email protected]> Populate cper aca register info for rma device.
Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/ras/core/aca.c | 14 ++++++++++ drivers/gpu/drm/amd/ras/core/aca.h | 2 ++ drivers/gpu/drm/amd/ras/core/aca_v1_0.c | 26 ++++++++++++++++++ drivers/gpu/drm/amd/ras/core/log_ring.c | 30 ++++++++------------- drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c | 22 +++++++++++++++ 5 files changed, 75 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/amd/ras/core/aca.c b/drivers/gpu/drm/amd/ras/core/aca.c index 60a435ae92c9a..0f5e57965ac86 100644 --- a/drivers/gpu/drm/amd/ras/core/aca.c +++ b/drivers/gpu/drm/amd/ras/core/aca.c @@ -691,3 +691,17 @@ u64 ras_aca_get_parser_caps(struct ras_core_context *ras_core) return 0; } + +int ras_aca_fill_rma_bank(struct ras_core_context *ras_core, + struct aca_bank_reg *bank) +{ + struct ras_aca *ras_aca = &ras_core->ras_aca; + + if (!bank) + return -EINVAL; + + if (ras_aca->ip_func && ras_aca->ip_func->fill_rma_bank) + return ras_aca->ip_func->fill_rma_bank(ras_core, bank); + + return -EOPNOTSUPP; +} diff --git a/drivers/gpu/drm/amd/ras/core/aca.h b/drivers/gpu/drm/amd/ras/core/aca.h index 518351fe187aa..52acf19fac11a 100644 --- a/drivers/gpu/drm/amd/ras/core/aca.h +++ b/drivers/gpu/drm/amd/ras/core/aca.h @@ -145,6 +145,7 @@ struct ras_aca_ip_func { uint32_t block_num; const struct aca_block_info **block_info; u64 (*aca_parse_ras_caps)(struct ras_core_context *ras_core); + int (*fill_rma_bank)(struct ras_core_context *ras_core, struct aca_bank_reg *bank); }; struct ras_aca { @@ -170,4 +171,5 @@ int ras_aca_parse_bank(struct ras_core_context *ras_core, struct aca_bank_reg *bank, struct aca_bank_ecc *ecc); u64 ras_aca_get_parser_caps(struct ras_core_context *ras_core); +int ras_aca_fill_rma_bank(struct ras_core_context *ras_core, struct aca_bank_reg *bank); #endif diff --git a/drivers/gpu/drm/amd/ras/core/aca_v1_0.c b/drivers/gpu/drm/amd/ras/core/aca_v1_0.c index 1f0ad3e502da1..a4145f30f45f3 100644 --- a/drivers/gpu/drm/amd/ras/core/aca_v1_0.c +++ b/drivers/gpu/drm/amd/ras/core/aca_v1_0.c @@ -384,8 +384,34 @@ static u64 aca_parse_ras_caps_v1_0(struct ras_core_context *ras_core) return parser_supported_mask; } +static int aca_fill_rma_bank_v1_0(struct ras_core_context *ras_core, struct aca_bank_reg *bank) +{ + struct device_system_info dev_info = {0}; + u64 socket_id; + int ret; + + if (!bank) + return -EINVAL; + + ret = ras_core_get_device_system_info(ras_core, &dev_info); + if (ret) + return ret; + + socket_id = dev_info.socket_id; + + memset(bank->regs, 0, sizeof(bank->regs)); + bank->regs[ACA_REG_IDX__CTL] = 0x1ULL; + bank->regs[ACA_REG_IDX__STATUS] = 0xB000000000000137ULL; + bank->regs[ACA_REG_IDX__CONFG] = 0x1ff00000002ULL; + bank->regs[ACA_REG_IDX__IPID] = 0x9600000000ULL | + ((socket_id / 4) & 0x01) | (((socket_id % 4) & 0x3) << 44); + + return 0; +} + const struct ras_aca_ip_func ras_aca_func_v1_0 = { .block_num = ARRAY_SIZE(aca_block_info_v1_0), .block_info = aca_block_info_v1_0, .aca_parse_ras_caps = aca_parse_ras_caps_v1_0, + .fill_rma_bank = aca_fill_rma_bank_v1_0, }; diff --git a/drivers/gpu/drm/amd/ras/core/log_ring.c b/drivers/gpu/drm/amd/ras/core/log_ring.c index fb42449fbd6c4..e57f7ea3f3079 100644 --- a/drivers/gpu/drm/amd/ras/core/log_ring.c +++ b/drivers/gpu/drm/amd/ras/core/log_ring.c @@ -32,16 +32,6 @@ #define BATCH_IDX_TO_TREE_IDX(batch_idx, sn) (((batch_idx) << 8) | (sn)) -static const uint64_t ras_rma_aca_reg[ACA_REG_MAX_COUNT] = { - [ACA_REG_IDX__CTL] = 0x1, - [ACA_REG_IDX__STATUS] = 0xB000000000000137, - [ACA_REG_IDX__ADDR] = 0x0, - [ACA_REG_IDX__MISC0] = 0x0, - [ACA_REG_IDX__CONFG] = 0x1ff00000002, - [ACA_REG_IDX__IPID] = 0x9600000000, - [ACA_REG_IDX__SYND] = 0x0, -}; - static uint64_t ras_log_ring_get_logged_ecc_count(struct ras_core_context *ras_core) { struct ras_log_ring *log_ring = &ras_core->ras_log_ring; @@ -227,9 +217,8 @@ int ras_log_ring_add_log_event(struct ras_core_context *ras_core, void *data, uint32_t size, struct ras_log_batch_tag *batch_tag) { struct ras_log_ring *log_ring = &ras_core->ras_log_ring; - struct device_system_info dev_info = {0}; struct ras_log_info *log; - uint64_t socket_id; + struct aca_bank_reg *rma_bank; void *obj; if (size > sizeof(union ras_log_body)) { @@ -263,13 +252,16 @@ int ras_log_ring_add_log_event(struct ras_core_context *ras_core, log->size = size; } - if (event == RAS_LOG_EVENT_RMA) { - memcpy(&log->body.aca_reg, ras_rma_aca_reg, sizeof(log->body.aca_reg)); - ras_core_get_device_system_info(ras_core, &dev_info); - socket_id = dev_info.socket_id; - log->body.aca_reg.regs[ACA_REG_IDX__IPID] |= ((socket_id / 4) & 0x01); - log->body.aca_reg.regs[ACA_REG_IDX__IPID] |= (((socket_id % 4) & 0x3) << 44); - log->size = sizeof(log->body.aca_reg); + if ((event == RAS_LOG_EVENT_RMA) && !data && !size) { + rma_bank = kzalloc_obj(*rma_bank); + if (rma_bank && !ras_aca_fill_rma_bank(ras_core, rma_bank)) { + memcpy(log->body.aca_reg.regs, + rma_bank->regs, sizeof(log->body.aca_reg.regs)); + log->size = sizeof(log->body.aca_reg); + } else { + RAS_DEV_WARN(ras_core->dev, "Failed to fill rma bank info!\n"); + } + kfree(rma_bank); } return ras_log_ring_add_data(ras_core, log, batch_tag); diff --git a/drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c b/drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c index 52036ca7a39af..e35f96c3ac350 100644 --- a/drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c +++ b/drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c @@ -348,8 +348,30 @@ static u64 aca_parse_ras_caps_v5_0(struct ras_core_context *ras_core) return parser_supported_mask; } +static int aca_fill_rma_bank_v5_0(struct ras_core_context *ras_core, struct aca_bank_reg *bank) +{ + struct device_system_info dev_info = {0}; + int ret; + + if (!bank) + return -EINVAL; + + ret = ras_core_get_device_system_info(ras_core, &dev_info); + if (ret) + return ret; + + memset(bank->regs, 0, sizeof(bank->regs)); + bank->regs[ACA_REG_IDX__CTL] = 0x1ULL; + bank->regs[ACA_REG_IDX__STATUS] = 0xB000000000000137ULL; + bank->regs[ACA_REG_IDX__CONFG] = 0x1ff00000002ULL; + bank->regs[ACA_REG_IDX__IPID] = 0x9600000000ULL | (dev_info.socket_id & 0xFF); + + return 0; +} + const struct ras_aca_ip_func ras_aca_func_v5_0 = { .block_num = ARRAY_SIZE(aca_block_info_v5_0), .block_info = aca_block_info_v5_0, .aca_parse_ras_caps = aca_parse_ras_caps_v5_0, + .fill_rma_bank = aca_fill_rma_bank_v5_0, }; -- 2.55.0
