From: Likun Gao <[email protected]> Remove retired cp command package for GC version 12.1.
Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/gfx_v12_1_pkt.h | 39 ---------------------- 1 file changed, 39 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1_pkt.h b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1_pkt.h index 77b4f6ea532f5..349c28685c7c0 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1_pkt.h +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1_pkt.h @@ -53,8 +53,6 @@ /* Packet 3 types */ #define PACKET3_NOP 0x10 -#define PACKET3_CLEAR_STATE 0x12 -#define PACKET3_INDEX_BUFFER_SIZE 0x13 #define PACKET3_DISPATCH_DIRECT 0x15 #define PACKET3_DISPATCH_INDIRECT 0x16 #define PACKET3_ATOMIC_MEM 0x1E @@ -81,23 +79,10 @@ #define PACKET3_ATOMIC_MEM__TEMPORAL__NT 1 #define PACKET3_ATOMIC_MEM__TEMPORAL__FW 2 #define PACKET3_ATOMIC_MEM__TEMPORAL__UC 3 -#define PACKET3_OCCLUSION_QUERY 0x1F -#define PACKET3_SET_PREDICATION 0x20 -#define PACKET3_REG_RMW 0x21 #define PACKET3_COND_EXEC 0x22 #define PACKET3_PRED_EXEC 0x23 #define PACKET3_PRED_EXEC__EXEC_COUNT(x) ((((unsigned)(x)) & 0x3FFF) << 0) #define PACKET3_PRED_EXEC__VIRTUALXCCID_SELECT(x) ((((unsigned)(x)) & 0xFF) << 24) -#define PACKET3_DRAW_INDIRECT 0x24 -#define PACKET3_DRAW_INDEX_INDIRECT 0x25 -#define PACKET3_INDEX_BASE 0x26 -#define PACKET3_DRAW_INDEX_2 0x27 -#define PACKET3_CONTEXT_CONTROL 0x28 -#define PACKET3_DRAW_INDIRECT_MULTI 0x2C -#define PACKET3_DRAW_INDEX_AUTO 0x2D -#define PACKET3_NUM_INSTANCES 0x2F -#define PACKET3_DRAW_INDEX_MULTI_AUTO 0x30 -#define PACKET3_DRAW_INDEX_OFFSET_2 0x35 #define PACKET3_WRITE_DATA 0x37 #define PACKET3_WRITE_DATA__DST_SEL(x) ((((unsigned)(x)) & 0xF) << 8) #define PACKET3_WRITE_DATA__DST_SEL__MEM_MAPPED_REGISTER 0 @@ -148,7 +133,6 @@ #define PACKET3_WRITE_DATA__DST_MMREG_ADDR_HI(x) ((((unsigned)(x)) & 0x3FFF) << 0) #define PACKET3_WRITE_DATA__DST_MEM_ADDR_HI(x) ((unsigned)(x)) #define PACKET3_WRITE_DATA__DATA(x) ((unsigned)(x)) -#define PACKET3_DRAW_INDEX_INDIRECT_MULTI 0x38 #define PACKET3_WAIT_REG_MEM 0x3C #define PACKET3_WAIT_REG_MEM__FUNCTION(x) ((((unsigned)(x)) & 0x7) << 0) #define PACKET3_WAIT_REG_MEM__FUNCTION__ALWAYS_PASS 0 @@ -298,7 +282,6 @@ #define PACKET3_COPY_DATA__DST_SCOPE__SYSTEM 3 #define PACKET3_COPY_DATA__PQ_EXE_STATUS__DEFAULT 0 #define PACKET3_COPY_DATA__PQ_EXE_STATUS__PHASE_UPDATE 1 -#define PACKET3_PFP_SYNC_ME 0x42 #define PACKET3_COND_WRITE 0x45 #define PACKET3_EVENT_WRITE 0x46 #define PACKET3_EVENT_WRITE__EVENT_TYPE(x) ((((unsigned)(x)) & 0x3F) << 0) @@ -309,8 +292,6 @@ #define PACKET3_EVENT_WRITE__EVENT_INDEX__OTHER 0 #define PACKET3_EVENT_WRITE__EVENT_INDEX__SAMPLE_PIPELINESTAT 2 #define PACKET3_EVENT_WRITE__EVENT_INDEX__CS_PARTIAL_FLUSH 4 -#define PACKET3_EVENT_WRITE_EOP 0x47 -#define PACKET3_EVENT_WRITE_EOS 0x48 #define PACKET3_RELEASE_MEM 0x49 #define PACKET3_RELEASE_MEM__EVENT_TYPE(x) ((((unsigned)(x)) & 0x3F) << 0) #define PACKET3_RELEASE_MEM__WAIT_SYNC(x) ((((unsigned)(x)) & 0x1) << 7) @@ -383,9 +364,6 @@ #define PACKET3_RELEASE_MEM__CMP_DATA_HI(x) ((unsigned)(x)) #define PACKET3_RELEASE_MEM__INT_CTXID(x) ((unsigned)(x)) -#define PACKET3_PREAMBLE_CNTL 0x4A -# define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) -# define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) #define PACKET3_DMA_DATA 0x50 /* 1. header * 2. CONTROL @@ -436,7 +414,6 @@ # define PACKET3_DMA_DATA_CMD_DAIC (1 << 29) # define PACKET3_DMA_DATA_CMD_RAW_WAIT (1 << 30) # define PACKET3_DMA_DATA_CMD_DIS_WC (1 << 30) -#define PACKET3_CONTEXT_REG_RMW 0x51 #define PACKET3_ACQUIRE_MEM 0x58 /* 1. HEADER */ #define PACKET3_ACQUIRE_MEM__COHER_SIZE(x) ((unsigned)(x)) @@ -510,20 +487,11 @@ * 2: REVERSE */ #define PACKET3_ACQUIRE_MEM__GCR_CNTL__GCR_RANGE_IS_PA (1 << 18) -#define PACKET3_GEN_PDEPTE 0x5B #define PACKET3_PRIME_UTCL2 0x5D -#define PACKET3_LOAD_UCONFIG_REG 0x5E -#define PACKET3_LOAD_SH_REG 0x5F -#define PACKET3_LOAD_CONFIG_REG 0x60 -#define PACKET3_LOAD_CONTEXT_REG 0x61 -#define PACKET3_LOAD_COMPUTE_STATE 0x62 #define PACKET3_LOAD_SH_REG_INDEX 0x63 #define PACKET3_SET_CONFIG_REG 0x68 #define PACKET3_SET_CONFIG_REG_START 0x00002000 #define PACKET3_SET_CONFIG_REG_END 0x00002c00 -#define PACKET3_SET_CONTEXT_REG 0x69 -#define PACKET3_SET_CONTEXT_REG_START 0x0000a000 -#define PACKET3_SET_CONTEXT_REG_END 0x0000a400 #define PACKET3_SET_SH_REG 0x76 #define PACKET3_SET_SH_REG_START 0x00002c00 #define PACKET3_SET_SH_REG_END 0x00003000 @@ -533,17 +501,12 @@ #define PACKET3_SET_SH_REG__REG_DATA(x) (((unsigned)(x))) #define PACKET3_SET_SH_REG__INDEX__DEFAULT 0 #define PACKET3_SET_SH_REG__INDEX__INSERT_VMID 1 -#define PACKET3_SET_SH_REG_OFFSET 0x77 #define PACKET3_SET_QUEUE_REG 0x78 #define PACKET3_SET_UCONFIG_REG 0x79 #define PACKET3_SET_UCONFIG_REG_START 0x0000c000 #define PACKET3_SET_UCONFIG_REG_END 0x0000c400 #define PACKET3_SET_UCONFIG_REG__REG_OFFSET(x) ((((unsigned)(x)) & 0xFFFF) << 0) #define PACKET3_SET_UCONFIG_REG__REG_DATA(x) (((unsigned)(x))) -#define PACKET3_SET_UCONFIG_REG_INDEX 0x7A -#define PACKET3_DISPATCH_DRAW_PREAMBLE 0x8C -#define PACKET3_DISPATCH_DRAW 0x8D -#define PACKET3_INDEX_ATTRIBUTES_INDIRECT 0x91 #define PACKET3_WAIT_REG_MEM64 0x93 #define PACKET3_HDP_FLUSH 0x95 #define PACKET3_INVALIDATE_TLBS 0x98 @@ -552,9 +515,7 @@ #define PACKET3_INVALIDATE_TLBS_PASID(x) ((x) << 5) #define PACKET3_INVALIDATE_TLBS_FLUSH_TYPE(x) ((x) << 29) -#define PACKET3_DMA_DATA_FILL_MULTI 0x9A #define PACKET3_SET_SH_REG_INDEX 0x9B -#define PACKET3_LOAD_CONTEXT_REG_INDEX 0x9F #define PACKET3_SET_RESOURCES 0xA0 /* 1. header * 2. CONTROL -- 2.55.0
