Use SDMA rather than MMIO on vega20 and older. The avoids the need to disallow gfxoff when invalidating.
Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index e9e5a1e183231..2b359c56f8d44 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -2183,6 +2183,8 @@ static int gmc_v9_0_hw_init(struct amdgpu_ip_block *ip_block) adev->gmc.flush_pasid_uses_kiq = true; if (adev->gmc.flush_pasid_uses_kiq) adev->gmc.pasid_inv_method = AMDGPU_TLB_INV_METHOD_KIQ; + if (amdgpu_ip_version(adev, GC_HWIP, 0) <= IP_VERSION(9, 4, 0)) + adev->gmc.gart_inv_method = AMDGPU_TLB_INV_METHOD_SDMA; /* Vega20+XGMI caches PTEs in TC and TLB. Add a heavy-weight TLB flush * (type 2), which flushes both. Due to a race condition with -- 2.55.0
