From: Philip Yang <[email protected]> The UALink soft ring overflows under bursts of interrupts from remote GPUs. Size it at 16x the default soft ring to absorb the burst.
While here, read the source accel_id and context dwords before the delegate path and log them, so the originating GPU is recorded for every interrupt. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Mukul Joshi <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c | 17 ++++++++--------- drivers/gpu/drm/amd/amdgpu/ih_v7_0.c | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h index 11f834c97d937..8d74a89b40cf8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h @@ -30,6 +30,7 @@ #define IH_RING_SIZE (256 * 1024) #define IH_SW_RING_SIZE (16 * 1024) /* enough for 512 CAM entries */ #define IH_PSP_RING_SIZE (SZ_4K) +#define IH_UALINK_RING_SIZE (256 * 1024) struct amdgpu_device; struct amdgpu_iv_entry; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c index 84e556e0c4d19..d4a5304ee2d81 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c @@ -5403,13 +5403,6 @@ static int amdgpu_ualink_process_irq(struct amdgpu_device *adev, entry->ih == &adev->irq.ih ? "ring" : "ualink soft ring", entry->client_id, entry->src_id); - /* Copy IH entry into ualink soft ring. */ - if (entry->ih == &adev->irq.ih) { - dev_dbg(adev->dev, "delegate to ualink irq soft ring\n"); - amdgpu_irq_ualink_delegate(adev, entry, 8); - return handled; - } - /* ContextID 4 dwords */ src_acc_id = entry->pasid; dw0 = entry->src_data[0]; @@ -5417,8 +5410,14 @@ static int amdgpu_ualink_process_irq(struct amdgpu_device *adev, dw2 = entry->src_data[2]; dw3 = entry->src_data[3]; - dev_dbg(adev->dev, "src accel_id %u context id 0x%x 0x%x 0x%x 0x%x\n", - src_acc_id, dw0, dw1, dw2, dw3); + /* Copy IH entry into ualink soft ring. */ + if (entry->ih == &adev->irq.ih) { + dev_dbg(adev->dev, "src accel_id %u context id 0x%x 0x%x 0x%x 0x%x\n", + src_acc_id, dw0, dw1, dw2, dw3); + dev_dbg(adev->dev, "delegate to ualink irq soft ring\n"); + amdgpu_irq_ualink_delegate(adev, entry, 8); + return handled; + } msg_type = dw0 & AMDGPU_UALINK_MESSAGE_HEADER_MASK; local_acc_id = adev->ualink.info->ppod.accel_id; diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c index c93ef937c4309..3745439b86b36 100644 --- a/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c @@ -643,7 +643,7 @@ static int ih_v7_0_sw_init(struct amdgpu_ip_block *ip_block) return r; dev_dbg(adev->dev, "ualink init ih_ualink\n"); - r = amdgpu_ih_ring_init(adev, &adev->irq.ih_ualink, sw_ring_size, true); + r = amdgpu_ih_ring_init(adev, &adev->irq.ih_ualink, IH_UALINK_RING_SIZE, true); if (r) return r; -- 2.55.0
