From: Mukul Joshi <[email protected]>

Reserve MMHUB VMID 15 to be used for NPA VM.

Signed-off-by: Mukul Joshi <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h |  1 +
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 22 ++++++++++++++++------
 2 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 3533d677b4a20..7a0ee19a12b18 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -411,6 +411,7 @@ struct amdgpu_vm_manager {
 
        /* Global registration of recent page fault information */
        struct amdgpu_vm_fault_info     fault_info;
+       unsigned int                            npa_vmid;
 };
 
 struct amdgpu_bo_va_mapping;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index 3ae3ba42c6b0f..0cc73982ed6f9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
@@ -814,6 +814,7 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block 
*ip_block)
        int r, vram_width = 0, vram_type = 0, vram_vendor = 0, dma_addr_bits;
        struct amdgpu_device *adev = ip_block->adev;
        uint64_t pte_addr_mask = 0;
+       u32 mmhub_vmid_mask;
        int i;
 
        adev->mmhub.funcs->init(adev);
@@ -958,16 +959,25 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block 
*ip_block)
         * VMID 0 is reserved for System
         * amdgpu graphics/compute will use VMIDs 1-7
         * amdkfd will use VMIDs 8-15.
-        * On GFX 12.1, amdkfd will use VMIDs 3-15.
+        * On GFX 12.1, amdkfd will use VMIDs 3-15, with VMID 15 reserved
+        * for NPA and therefore excluded from the MMHUB VMID pool.
         */
-       adev->vm_manager.first_kfd_vmid =
-               adev->gfx.disable_kq ? 1 :
-               (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 1, 0) ?
-               3 : 8);
+       mmhub_vmid_mask = GENMASK(AMDGPU_NUM_VMID - 1, 1);
+       if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 1, 0)) {
+               adev->vm_manager.first_kfd_vmid = 3;
+               adev->vm_manager.npa_vmid = 15;
+               mmhub_vmid_mask &= ~BIT(adev->vm_manager.npa_vmid);
+       } else {
+               adev->vm_manager.first_kfd_vmid = 8;
+       }
+
+       if (adev->gfx.disable_kq)
+               adev->vm_manager.first_kfd_vmid = 1;
+
+       amdgpu_vmid_mgr_set_vmid_mask(adev, mmhub_vmid_mask, true);
        amdgpu_vmid_mgr_set_vmid_mask(adev,
                                      GENMASK(adev->vm_manager.first_kfd_vmid - 
1, 1),
                                      false);
-       amdgpu_vmid_mgr_set_vmid_mask(adev, GENMASK(AMDGPU_NUM_VMID - 1, 1), 
true);
 
        amdgpu_vm_manager_init(adev);
 
-- 
2.55.0

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