From: Ovidiu Bunea <[email protected]> [why & how] DCN IP team recommends SDPIF_PORT_CONTROL=0 as POR value for APUs.
The new POR value ensures that DCHUBBUB will not disconnect the SDP port to DF unless it explicitly receives the pre_cstate_req signal. SDPIF_PORT_CONTROL=1 will only be used for IPS entry sequences, where it will be restored to 0 upon IPS exit. Reviewed-by: Leo Chen <[email protected]> Signed-off-by: Ovidiu Bunea <[email protected]> Signed-off-by: Chenyu Chen <[email protected]> --- .../drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c | 5 ----- .../drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c | 7 +------ .../drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c | 13 +------------ 3 files changed, 2 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c b/drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c index cbcd22789013..35c94ca8335a 100644 --- a/drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c +++ b/drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c @@ -1048,11 +1048,6 @@ void hubbub31_init(struct hubbub *hubbub) DISPCLK_R_DCHUBBUB_GATE_DIS, 1, DCFCLK_R_DCHUBBUB_GATE_DIS, 1); } - - /* - only the DCN will determine when to connect the SDP port - */ - REG_UPDATE(DCHUBBUB_SDPIF_CFG0, SDPIF_PORT_CONTROL, 1); } static const struct hubbub_funcs hubbub31_funcs = { .update_dchub = hubbub2_update_dchub, diff --git a/drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c b/drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c index 53744b000f5d..466bab437e37 100644 --- a/drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c +++ b/drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c @@ -531,12 +531,7 @@ void hubbub35_init(struct hubbub *hubbub) hubbub35_set_fgcg(hubbub2, hubbub->ctx->dc->debug.enable_fine_grain_clock_gating .bits.dchubbub); - /* - ignore the "df_pre_cstate_req" from the SDP port control. - only the DCN will determine when to connect the SDP port - */ - REG_UPDATE(DCHUBBUB_SDPIF_CFG0, - SDPIF_PORT_CONTROL, 1); + /*Set SDP's max outstanding request When set to 1: Max outstanding is 512 When set to 0: Max outstanding is 256 diff --git a/drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c b/drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c index ddfc60e845a4..71bc926c7035 100644 --- a/drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c +++ b/drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c @@ -431,13 +431,6 @@ static void hubbub42_allow_self_refresh_control(struct hubbub *hubbub, bool allo DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE, 0, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE, !allow); } -static void hubbub42_set_sdp_control(struct hubbub *hubbub, bool dc_control) -{ - struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub); - - REG_UPDATE(DCHUBBUB_SDPIF_CFG0, - SDPIF_PORT_CONTROL, dc_control); -} static bool hubbub42_program_watermarks( struct hubbub *hubbub, @@ -449,9 +442,8 @@ static bool hubbub42_program_watermarks( struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub); if (!safe_to_lower && hubbub->ctx->dc->debug.disable_stutter_for_wm_program) { - /* before raising watermarks, SDP control give to DF, stutter must be disabled */ + /* before raising watermarks, stutter must be disabled */ wm_pending = true; - hubbub42_set_sdp_control(hubbub, false); hubbub42_allow_self_refresh_control(hubbub, false); } if (hubbub42_program_urgent_watermarks(hubbub, watermarks, safe_to_lower)) @@ -478,9 +470,6 @@ static bool hubbub42_program_watermarks( if (safe_to_lower || hubbub->ctx->dc->debug.disable_stutter) hubbub42_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); - if (safe_to_lower && hubbub->ctx->dc->debug.disable_stutter_for_wm_program) { - hubbub42_set_sdp_control(hubbub, true); - } hubbub32_force_usr_retraining_allow(hubbub, hubbub->ctx->dc->debug.force_usr_allow); return wm_pending; -- 2.43.0
