Route kernel GFX resets through amdgpu_gfx_reset_mes_gfx() when PER_PIPE is supported, so collateral kernel rings are preserved across a pipe reset. Keep the existing queue reset path otherwise.
Signed-off-by: Jesse Zhang <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index 7c597dab5b2a..94d45d7960e2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -2181,13 +2181,19 @@ int amdgpu_gfx_mes_reset_queue(struct amdgpu_ring *ring, struct amdgpu_fence *timedout_fence, bool use_mmio) { + struct amdgpu_device *adev = ring->adev; int r; - r = amdgpu_gfx_mes_reset_queue_start(ring, vmid, timedout_fence, - use_mmio); - if (r) - return r; - return amdgpu_ring_reset_helper_end(ring, timedout_fence); + if (!amdgpu_gfx_me_pipe_reset_supported(adev)) { + r = amdgpu_gfx_mes_reset_queue_start(ring, vmid, timedout_fence, + use_mmio); + if (r) + return r; + return amdgpu_ring_reset_helper_end(ring, timedout_fence); + } + + return amdgpu_gfx_reset_mes_gfx(adev, ring, timedout_fence, NULL, vmid, + use_mmio); } static DEVICE_ATTR(run_cleaner_shader, 0200, -- 2.49.0
