Use gfx_supported_reset's PER_PIPE bit to report GFX pipe reset support through a shared helper.
Signed-off-by: Jesse Zhang <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 10 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index 2da839228911..7c597dab5b2a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -2376,6 +2376,16 @@ static void amdgpu_gfx_reset_stop_compute_scheds(struct amdgpu_device *adev, } } +bool amdgpu_gfx_me_pipe_reset_supported(struct amdgpu_device *adev) +{ + if (!!(adev->gfx.gfx_supported_reset & AMDGPU_RESET_TYPE_PER_PIPE)) + return true; + else + dev_warn_once(adev->dev, "Please use the latest MEC version to see whether support pipe reset\n"); + + return false; +} + /* Caller holds reset_mutex and attempted MES suspend before HQD lookup. */ void amdgpu_gfx_pipe_reset_prepare(struct amdgpu_device *adev, struct amdgpu_ring *guilty_ring, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h index 855651f0c930..5939e1fb3b24 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h @@ -707,6 +707,7 @@ struct amdgpu_gfx_pipe_reset_ctx { unsigned long replay_mask; }; +bool amdgpu_gfx_me_pipe_reset_supported(struct amdgpu_device *adev); void amdgpu_gfx_pipe_reset_prepare(struct amdgpu_device *adev, struct amdgpu_ring *guilty_ring, u32 me, u32 pipe, -- 2.49.0
