Hi, This series adds second-level trap handler support for render-node user queues and kernel-managed VMIDs.
The first-level trap state is associated with the GPUVM because the TBA and TMA are mappings in that GPU virtual address space. This allows all queue paths using the same GPUVM to use the same first-level trap state. User queues receive the first-level TBA/TMA information through MES. For kernel-managed VMIDs, the required trap registers are programmed from the gfxhub setup path. The first-level TBA/TMA layout is kept private to amdgpu_trap. Gfxhub only obtains the final addresses through amdgpu_trap_get_l1_addr() and does not need to know how the reserved trap VA is divided. SET_L2_TRAP and CLEAR_L2_TRAP are exposed through the VM ioctl. The second-level trap handler is configured per GPUVM. Thanks to everyone who reviewed v1 and provided feedback. Changes in v2: - Make the first-level trap state owned by the GPUVM and remove the duplicate file-private trap object. - Allocate the trap object after releasing the initial VM root reservation to avoid recursive reservation. - Use the common AMDGPU_VA_RESERVED_TRAP_START for the first-level trap mapping and remove the separate user queue trap VA reservation. - Place the first-level TMA at a GPU-page-aligned offset after the two-page first-level TBA mapping. - Keep the first-level TBA/TMA layout private to amdgpu_trap and provide the final addresses through amdgpu_trap_get_l1_addr(). - Keep the first-level TMA BO unpinned and map it only while accessing its contents. - Protect TMA CPU accesses with the reset-domain read lock. - Place dma_wmb() after the final TMA descriptor write. - Evict user queues and wait for outstanding work tracked by the GPUVM reservation before changing the second-level trap descriptor. - Restore user queues while the VM root reservation is held, including SET/CLEAR error paths. - Remove the VM_ALWAYS_VALID requirement for userspace second-level TBA and TMA mappings. - Remove the unused GEM_VA UNMAP helper and the associated L2 removal state. - Update the SET/CLEAR documentation to describe the second-level trap handler as a per-GPUVM setting and match the current synchronization behavior. Only compilation and driver load tested. Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Srinivasan Shanmugam (4): drm/amdgpu: Add second-level trap handler infrastructure drm/amdgpu: Make first-level trap state GPUVM-owned drm/amdgpu: Program trap TBA/TMA for kernel-managed VMIDs drm/amdgpu/uapi: Add SET/CLEAR L2 TRAP to VM ioctl drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 - drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 - drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_trap.c | 400 ++++++++++++++------ drivers/gpu/drm/amd/amdgpu/amdgpu_trap.h | 71 +++- drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 12 +- drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 46 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 16 +- drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c | 36 ++ drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c | 36 ++ drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c | 40 ++ drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 36 ++ drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c | 36 ++ drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 7 +- include/uapi/drm/amdgpu_drm.h | 94 +++-- 16 files changed, 676 insertions(+), 166 deletions(-) -- 2.34.1
