From: Dillon Varone <[email protected]> [WHY&HOW] Not all revisions require the same clock overrides.
Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Reviewed-by: Alvin Lee <[email protected]> --- .../gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c index 04891ae776b6..26972c220e34 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c @@ -729,8 +729,10 @@ static void dcn60_override_utm_qos_model(struct clk_mgr_internal *clk_mgr, static void dcn60_override_bw_params(struct clk_mgr_internal *clk_mgr, struct clk_bw_params *bw_params) { - dcn60_override_clk_table(clk_mgr, &bw_params->clk_table); - dcn60_override_dc_mode_limit(clk_mgr, bw_params); + if (!ASICREV_IS_DCN6_VARIANT_LITE3(clk_mgr->base.ctx->asic_id.hw_internal_rev)) { + dcn60_override_clk_table(clk_mgr, &bw_params->clk_table); + dcn60_override_dc_mode_limit(clk_mgr, bw_params); + } if (dcn60_should_apply_temp_utm_override) dcn60_override_utm_qos_model(clk_mgr, bw_params); -- 2.53.0
