From: Ivan Lipski <[email protected]> This DC patchset brings improvements in multiple areas. In summary, we highlight:
- Refactor DC IP request control in HWSS. - Fix rotate 90 degrees surface corruption issue. - Refactor DPP root clock control in HWSS. - Fix upsampling and linear scaling. - Use aux hw inst if no ddc pin exists. - Directly include compiler_attributes.h. - Fix frac_urg_bw conversion to correct U0.10 format. - Do full link training during HDR/SDR seamless switch. - Fix SPL format handling for linear scaling and upsampling. - Update DCN42 cstate latencies. - Invalidate the DRR shadow after a hardware re-init. - Program HDR visual confirm based on per pipe info. - Split link_set_dsc_on_stream into encoder and DSC components. - Add new config_dsc hwseq function for DCN60. - Program DSC prior to OTG enable starting DCN60. - Improve mandatory pstate optimization and check. - Disable HUBP/DPP power gating on DCN42. Cc: Dan Wheeler <[email protected]> Alvin Lee (2): drm/amd/display: Use aux hw inst if no ddc pin exists drm/amd/display: Program HDR visual confirm based on per pipe info Aric Cyr (1): drm/amd/display: Invalidate the DRR shadow after a hardware re-init Charlene Liu (1): drm/amd/display: Fix rotate 90 degrees surface corruption issue Dillon Varone (1): drm/amd/display: Improve mandatory pstate optimization and check Dominik Kaszewski (1): drm/amd/display: Directly include compiler_attributes.h George Shen (3): drm/amd/display: Split link_set_dsc_on_stream into encoder and DSC components drm/amd/display: Add new config_dsc hwseq function for dcn60 drm/amd/display: Program DSC prior to OTG enable starting DCN60 Ivan Lipski (1): drm/amd/display: Fix FreeSync caps tests after common EDID VSDB switch Karthi Kandasamy (1): drm/amd/display: Do full link training during HDR/SDR seamless switch Leo Chen (1): drm/amd/display: Disable HUBP/DPP power gating on DCN42 Ovidiu Bunea (2): drm/amd/display: Fix frac_urg_bw conversion to correct U0.10 format drm/amd/display: Update DCN42 cstate latencies Rafal Ostrowski (2): drm/amd/display: HWSS Refactor - DC IP request control drm/amd/display: HWSS Refactor - DPP root clock control Sridevi Arvindekar (2): drm/amd/display: Fix upsampling for linear scaling of subsampled YUV drm/amd/display: Fix linear scaling and upsampling Taimur Hassan (1): drm/amd/display: Promote DC to 3.2.402 .../tests/amdgpu_dm_connector_test.c | 30 +- drivers/gpu/drm/amd/display/dc/Makefile | 1 + drivers/gpu/drm/amd/display/dc/core/dc.c | 43 ++- .../drm/amd/display/dc/core/dc_hw_sequencer.c | 93 ++++-- .../gpu/drm/amd/display/dc/core/dc_resource.c | 19 -- .../amd/display/dc/core/dc_resource_helper.c | 46 +++ drivers/gpu/drm/amd/display/dc/dc.h | 2 +- drivers/gpu/drm/amd/display/dc/dc_fused_io.c | 4 +- .../gpu/drm/amd/display/dc/dc_memory_pool.c | 1 + .../gpu/drm/amd/display/dc/dc_memory_pool.h | 2 + .../gpu/drm/amd/display/dc/dc_spl_translate.c | 22 +- .../amd/display/dc/dccg/dcn314/dcn314_dccg.c | 4 +- .../amd/display/dc/dccg/dcn35/dcn35_dccg.c | 21 +- .../amd/display/dc/dccg/dcn35/dcn35_dccg.h | 3 +- .../amd/display/dc/dccg/dcn42/dcn42_dccg.c | 2 +- .../dml21/inc/bounding_boxes/dcn42_soc_bb.h | 8 +- .../src/dml2_core/dml2_core_dcn4_calcs.c | 7 +- .../dml2_core/dml2_core_dcn5_calcs_dchub.c | 5 +- .../dml2_core/dml2_core_dcn6_calcs_dchub.c | 10 +- .../dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c | 20 +- .../dml21/src/dml2_dpmm/dml2_dpmm_dcn5.c | 13 +- .../dml2_pmo/dml2_pmo_dcn6_stage_optimizers.c | 97 +++--- .../src/inc/dml2_internal_shared_types.h | 2 +- .../drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c | 4 +- .../drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h | 3 +- .../drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c | 4 +- .../amd/display/dc/dpp/dcn201/dcn201_dpp.c | 4 +- .../drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 76 ++++- .../drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h | 9 +- .../amd/display/dc/dpp/dcn401/dcn401_dpp.c | 4 +- .../amd/display/dc/dpp/dcn401/dcn401_dpp.h | 3 +- .../display/dc/dpp/dcn401/dcn401_dpp_dscl.c | 8 +- .../drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c | 4 +- .../drm/amd/display/dc/dpp/dcn50/dcn50_dpp.c | 4 +- .../drm/amd/display/dc/dpp/dcn50/dcn50_dpp.h | 3 +- .../drm/amd/display/dc/dpp/dcn60/dcn60_dpp.c | 38 ++- .../drm/amd/display/dc/dpp/dcn60/dcn60_dpp.h | 15 +- .../amd/display/dc/dpp/dcn60/dcn60_dpp_dscl.c | 13 +- .../display/dc/hubbub/dcn31/dcn31_hubbub.c | 9 +- .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 13 +- .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 28 +- .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 23 +- .../amd/display/dc/hwss/dcn31/dcn31_hwseq.c | 21 +- .../amd/display/dc/hwss/dcn314/dcn314_hwseq.c | 20 +- .../amd/display/dc/hwss/dcn314/dcn314_hwseq.h | 2 + .../amd/display/dc/hwss/dcn314/dcn314_init.c | 1 + .../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 7 +- .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 24 +- .../amd/display/dc/hwss/dcn35/dcn35_hwseq.h | 2 + .../amd/display/dc/hwss/dcn35/dcn35_init.c | 1 + .../amd/display/dc/hwss/dcn351/dcn351_init.c | 1 + .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 27 +- .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h | 2 +- .../amd/display/dc/hwss/dcn42/dcn42_hwseq.c | 6 +- .../amd/display/dc/hwss/dcn42/dcn42_init.c | 1 + .../amd/display/dc/hwss/dcn50/dcn50_hwseq.c | 3 +- .../amd/display/dc/hwss/dcn60/dcn60_hwseq.c | 101 ++++++- .../amd/display/dc/hwss/dcn60/dcn60_hwseq.h | 1 + .../amd/display/dc/hwss/dcn60/dcn60_init.c | 1 + .../drm/amd/display/dc/hwss/hw_sequencer.h | 9 +- .../display/dc/hwss/hw_sequencer_private.h | 5 +- drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h | 6 +- drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 3 +- .../gpu/drm/amd/display/dc/link/link_dpms.c | 282 +++++++++++------- drivers/gpu/drm/amd/display/dc/os_types.h | 1 - .../dc/resource/dcn42/dcn42_resource.c | 4 +- .../dc/resource/dcn60/dcn60_resource.h | 6 + drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c | 52 ++-- 68 files changed, 874 insertions(+), 435 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/core/dc_resource_helper.c -- 2.43.0
