Update SET_SHADER_DEBUGGER packet with tcp_watch_addr_lo/hi fields. Remove direct TCP_WATCH register writes from set_address_watch().
Assisted-by: claude-code:claude-sonnet-4 Signed-off-by: David Belanger <[email protected]> Reviewed-by: Michael Chen <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c | 12 ------------ drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 6 ++++++ drivers/gpu/drm/amd/include/mes_v11_api_def.h | 3 +++ 3 files changed, 9 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c index 04fab30ab5dd4..96a308b946469 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c @@ -747,13 +747,9 @@ static uint32_t kgd_gfx_v11_set_address_watch(struct amdgpu_device *adev, uint32_t debug_vmid, uint32_t inst) { - uint32_t watch_address_high; - uint32_t watch_address_low; uint32_t watch_address_cntl; watch_address_cntl = 0; - watch_address_low = lower_32_bits(watch_address); - watch_address_high = upper_32_bits(watch_address) & 0xffff; watch_address_cntl = REG_SET_FIELD(watch_address_cntl, TCP_WATCH0_CNTL, @@ -770,14 +766,6 @@ static uint32_t kgd_gfx_v11_set_address_watch(struct amdgpu_device *adev, VALID, 1); - WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_H) + - (watch_id * TCP_WATCH_STRIDE)), - watch_address_high); - - WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_L) + - (watch_id * TCP_WATCH_STRIDE)), - watch_address_low); - return watch_address_cntl; } diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c index 043ac05eb0fa1..3939eed05150c 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c @@ -1028,6 +1028,12 @@ static int mes_v11_0_misc_op(struct amdgpu_mes *mes, memcpy(misc_pkt.set_shader_debugger.tcp_watch_cntl, input->set_shader_debugger.tcp_watch_cntl, sizeof(misc_pkt.set_shader_debugger.tcp_watch_cntl)); + for (int i = 0; i < 4; i++) { + misc_pkt.set_shader_debugger.tcp_watch_addr_lo[i] = + lower_32_bits(input->set_shader_debugger.watch_addresses[i]); + misc_pkt.set_shader_debugger.tcp_watch_addr_hi[i] = + upper_32_bits(input->set_shader_debugger.watch_addresses[i]) & 0xffff; + } misc_pkt.set_shader_debugger.trap_en = input->set_shader_debugger.trap_en; break; case MES_MISC_OP_CHANGE_CONFIG: diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h b/drivers/gpu/drm/amd/include/mes_v11_api_def.h index e251ccc41f9ca..de217882f5e8a 100644 --- a/drivers/gpu/drm/amd/include/mes_v11_api_def.h +++ b/drivers/gpu/drm/amd/include/mes_v11_api_def.h @@ -676,6 +676,9 @@ struct SET_SHADER_DEBUGGER { uint32_t spi_gdbg_per_vmid_cntl; uint32_t tcp_watch_cntl[4]; /* TCP_WATCHx_CNTL */ uint32_t trap_en; + uint32_t tcp_watch_addr_lo[4]; /* TCP_WATCHx_ADDR_L */ + uint32_t tcp_watch_addr_hi[4]; /* TCP_WATCHx_ADDR_H */ + uint32_t process_context_array_index; }; enum MESAPI_MISC__CHANGE_CONFIG_OPTION { -- 2.55.0
