[PATCH 5/8] drm/amdgpu: user reserved zfb to init vram base offset and size

[Feifei Xu]

Change-Id: I866dd16548304a42298b0cb28741f27cba3a76ca
Signed-off-by: Feifei Xu <feifei...@amd.com>
Signed-off-by: Hawking Zhang <hawking.zh...@amd.com>
Acked-by: John Bridgman <john.bridg...@amd.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 26 ++++++++++++++++++++------
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 0f61e05..94e13c8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -697,7 +697,10 @@ static void gmc_v9_0_vram_gtt_location(struct 
amdgpu_device *adev,
        amdgpu_device_vram_location(adev, &adev->gmc, base);
        amdgpu_device_gart_location(adev, mc);
        /* base offset of vram pages */
-       adev->vm_manager.vram_base_offset = gfxhub_v1_0_get_mc_fb_offset(adev);
+       if (adev->gmc.zfb_size > 0)
+               adev->vm_manager.vram_base_offset = adev->gmc.zfb_phys_addr;
+       else
+               adev->vm_manager.vram_base_offset = 
gfxhub_v1_0_get_mc_fb_offset(adev);
 }
 
 /**
@@ -761,8 +764,11 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
        }
 
        /* size in MB on si */
-       adev->gmc.mc_vram_size =
-               adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
+       if (adev->gmc.zfb_size > 0)
+               adev->gmc.mc_vram_size = adev->gmc.zfb_size;
+       else
+               adev->gmc.mc_vram_size =
+                       adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
        adev->gmc.real_vram_size = adev->gmc.mc_vram_size;
 
        if (!(adev->flags & AMD_IS_APU)) {
@@ -770,12 +776,20 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
                if (r)
                        return r;
        }
-       adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
-       adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+       if (adev->gmc.zfb_size > 0) {
+               adev->gmc.aper_base = adev->gmc.zfb_phys_addr;
+               adev->gmc.aper_size = adev->gmc.zfb_size;
+       } else {
+               adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
+               adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+       }
 
 #ifdef CONFIG_X86_64
        if (adev->flags & AMD_IS_APU) {
-               adev->gmc.aper_base = gfxhub_v1_0_get_mc_fb_offset(adev);
+               if (adev->gmc.zfb_size > 0)
+                       adev->gmc.aper_base = adev->gmc.zfb_phys_addr;
+               else
+                       adev->gmc.aper_base = 
gfxhub_v1_0_get_mc_fb_offset(adev);
                adev->gmc.aper_size = adev->gmc.real_vram_size;
        }
 #endif
-- 
2.7.4

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