Reviewed-by: Kevin Wang <kevin1.w...@amd.com>

BR
Kevin

On 7/31/19 11:39 AM, Evan Quan wrote:
> Hook up the SW SMU power profile switch in KFD routine.
>
> Change-Id: I41e53762cdc7504285de89f30e3e6e2bb396b953
> Signed-off-by: Evan Quan <evan.q...@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c    |  8 +++--
>   drivers/gpu/drm/amd/powerplay/amdgpu_smu.c    | 36 +++++++++++++++++++
>   .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h    |  3 ++
>   3 files changed, 45 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> index 43b11879713d..9c5dcaa8fa48 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> @@ -672,8 +672,12 @@ void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, 
> bool idle)
>   {
>       struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
>   
> -     if (adev->powerplay.pp_funcs &&
> -         adev->powerplay.pp_funcs->switch_power_profile)
> +     if (is_support_sw_smu(adev))
> +             smu_switch_power_profile(&adev->smu,
> +                                      PP_SMC_POWER_PROFILE_COMPUTE,
> +                                      !idle);
> +     else if (adev->powerplay.pp_funcs &&
> +              adev->powerplay.pp_funcs->switch_power_profile)
>               amdgpu_dpm_switch_power_profile(adev,
>                                               PP_SMC_POWER_PROFILE_COMPUTE,
>                                               !idle);
> diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 
> b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> index d99a8aa0defb..55ccb4e6a6fb 100644
> --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> @@ -1447,6 +1447,42 @@ int smu_handle_task(struct smu_context *smu,
>       return ret;
>   }
>   
> +int smu_switch_power_profile(struct smu_context *smu,
> +                          enum PP_SMC_POWER_PROFILE type,
> +                          bool en)
> +{
> +     struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
> +     long workload;
> +     uint32_t index;
> +
> +     if (!smu->pm_enabled)
> +             return -EINVAL;
> +
> +     if (!(type < PP_SMC_POWER_PROFILE_CUSTOM))
> +             return -EINVAL;
> +
> +     mutex_lock(&smu->mutex);
> +
> +     if (!en) {
> +             smu->workload_mask &= ~(1 << smu->workload_prority[type]);
> +             index = fls(smu->workload_mask);
> +             index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 
> 0;
> +             workload = smu->workload_setting[index];
> +     } else {
> +             smu->workload_mask |= (1 << smu->workload_prority[type]);
> +             index = fls(smu->workload_mask);
> +             index = index <= WORKLOAD_POLICY_MAX ? index - 1 : 0;
> +             workload = smu->workload_setting[index];
> +     }
> +
> +     if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
> +             smu_set_power_profile_mode(smu, &workload, 0);
> +
> +     mutex_unlock(&smu->mutex);
> +
> +     return 0;
> +}
> +
>   enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu)
>   {
>       struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 
> b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
> index 9c0a53ef93c4..1b44414cec3b 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
> @@ -973,6 +973,9 @@ extern int smu_dpm_set_power_gate(struct smu_context 
> *smu,uint32_t block_type, b
>   extern int smu_handle_task(struct smu_context *smu,
>                          enum amd_dpm_forced_level level,
>                          enum amd_pp_task task_id);
> +int smu_switch_power_profile(struct smu_context *smu,
> +                          enum PP_SMC_POWER_PROFILE type,
> +                          bool en);
>   int smu_get_smc_version(struct smu_context *smu, uint32_t *if_version, 
> uint32_t *smu_version);
>   int smu_get_dpm_freq_by_index(struct smu_context *smu, enum smu_clk_type 
> clk_type,
>                             uint16_t level, uint32_t *value);
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