Correct Polaris VRconfig setting.
Change-Id: I8cf3151c04f130ff25fb12b6e4bf994cba2bd91e
Signed-off-by: Evan Quan <[email protected]>
Acked-by: Alex Deucher <[email protected]>
---
.../amd/pm/powerplay/smumgr/polaris10_smumgr.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
b/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
index 72ca4bd2c2f3..997b996b25bf 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
@@ -1712,6 +1712,9 @@ static int polaris10_populate_vr_config(struct pp_hwmgr
*hwmgr,
if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->voltage_control) {
config = VR_SVI2_PLANE_1;
table->VRConfig |= config;
+ } else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->voltage_control) {
+ config = VR_SMIO_PATTERN_1;
+ table->VRConfig |= config;
} else {
PP_ASSERT_WITH_CODE(false,
"VDDC should be on SVI2 control in merged
mode!",
@@ -1730,7 +1733,17 @@ static int polaris10_populate_vr_config(struct pp_hwmgr
*hwmgr,
}
/* Set Mvdd Voltage Controller */
if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->mvdd_control) {
- config = VR_SVI2_PLANE_2;
+ if (config != VR_SVI2_PLANE_2) {
+ config = VR_SVI2_PLANE_2;
+ table->VRConfig |= (config << VRCONF_MVDD_SHIFT);
+ cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
smu_data->smu7_data.soft_regs_start +
+ offsetof(SMU74_SoftRegisters, AllowMvddSwitch),
0x1);
+ } else {
+ config = VR_STATIC_VOLTAGE;
+ table->VRConfig |= (config << VRCONF_MVDD_SHIFT);
+ }
+ } else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
+ config = VR_SMIO_PATTERN_2;
table->VRConfig |= (config << VRCONF_MVDD_SHIFT);
cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
smu_data->smu7_data.soft_regs_start +
offsetof(SMU74_SoftRegisters, AllowMvddSwitch), 0x1);
--
2.28.0
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