Reconfigure smc display settings on vbitimeout change.
Change-Id: Ia026f6585954ce4e7f6bbd2e270a201f9c3fe25b
Signed-off-by: Evan Quan <[email protected]>
Acked-by: Alex Deucher <[email protected]>
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 6 ++++++
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 509136ea193c..d6c903e80692 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -4318,6 +4318,7 @@ static int smu7_notify_has_display(struct pp_hwmgr *hwmgr)
smum_send_msg_to_smc_with_parameter(hwmgr,
(PPSMC_Msg)PPSMC_MSG_SetVBITimeout,
data->frame_time_x2,
NULL);
+ data->last_sent_vbi_timeout = data->frame_time_x2;
}
return (smum_send_msg_to_smc(hwmgr, (PPSMC_Msg)PPSMC_HasDisplay, NULL)
== 0) ? 0 : -EINVAL;
@@ -4560,6 +4561,11 @@
smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)
if (data->display_timing.vrefresh != hwmgr->display_config->vrefresh)
is_update_required = true;
+ if (hwmgr->chip_id >= CHIP_POLARIS10 &&
+ hwmgr->chip_id <= CHIP_VEGAM &&
+ data->last_sent_vbi_timeout != data->frame_time_x2)
+ is_update_required = true;
+
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_SclkDeepSleep)) {
if (data->display_timing.min_clock_in_sr !=
hwmgr->display_config->min_core_set_clock_in_sr &&
(data->display_timing.min_clock_in_sr >=
SMU7_MINIMUM_ENGINE_CLOCK ||
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h
index dbcba73fd750..d9e8b386bd4d 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h
@@ -336,6 +336,7 @@ struct smu7_hwmgr {
uint32_t avfs_vdroop_override_setting;
bool apply_avfs_cks_off_voltage;
uint32_t frame_time_x2;
+ uint32_t last_sent_vbi_timeout;
uint16_t mem_latency_high;
uint16_t mem_latency_low;
uint32_t vr_config;
--
2.28.0
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